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ADV7171KSU

IC COLOR SIGNAL ENCODER, PQFP44, PLASTIC, MS-026ACB, TQFP-44, Color Signal Converter

器件类别:其他集成电路(IC)    消费电路   

厂商名称:ADI(亚德诺半导体)

厂商官网:https://www.analog.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
ADI(亚德诺半导体)
零件包装代码
QFP
包装说明
TQFP, TQFP44,.47SQ,32
针数
44
Reach Compliance Code
not_compliant
ECCN代码
EAR99
其他特性
IT CAN ALSO OPERATE AT 4.75V TO 5.25V SUPPLY
商用集成电路类型
COLOR SIGNAL ENCODER
输入类型
R-Y; B-Y; Y
JESD-30 代码
S-PQFP-G44
JESD-609代码
e0
长度
10 mm
湿度敏感等级
3
功能数量
1
端子数量
44
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
PLASTIC/EPOXY
封装代码
TQFP
封装等效代码
TQFP44,.47SQ,32
封装形状
SQUARE
封装形式
FLATPACK, THIN PROFILE
峰值回流温度(摄氏度)
240
电源
3.3/5 V
认证状态
Not Qualified
座面最大高度
1.2 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn85Pb15)
端子形式
GULL WING
端子节距
0.8 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
30
视频标准
PAL; NTSC
宽度
10 mm
文档预览
Digital PAL/NTSC Video Encoder with 10-Bit
SSAF™ and Advanced Power Management
ADV7170/ADV7171
FEATURES
ITU-R
1
BT601/656 YCrCb to PAL/NTSC video encoder
High quality 10-bit video DACs
SSAF (super sub-alias filter)
Advanced power management features
CGMS (copy generation management system)
WSS (wide screen signalling)
Simultaneous Y, U, V, C output format
NTSC M, PAL M/N
2
, PAL B/D/G/H/I, PAL60
Single 27 MHz clock required (×2 oversampling)
80 dB video SNR
32-bit direct digital synthesizer for color subcarrier
Multistandard video output support
Composite (CVBS)
Components S-Video (Y/C), YUV, and RGB
EuroSCART output (RGB + CVBS/LUMA)
Component YUV + CHROMA
Video input data port supports
CCIR-656 4:2:2 8-bit parallel input format
4:2:2 16-bit parallel input format
Programmable simultaneous composite and S-Video or RGB
(SCART)/YUV video outputs
Programmable luma filters (low-pass [PAL/NTSC]) notch,
extended (SSAF, CIF, and QCIF)
Programmable chroma filters (low-pass [0.65 MHz, 1.0 MHz,
1.2 MHz and 2.0 MHz], CIF and QCIF)
Programmable VBI (vertical blanking interval)
Programmable subcarrier frequency and phase
TTXREQ
POWER
MANAGEMENT
CONTROL
(SLEEP MODE)
TTX
10
TELETEXT
INSERTION
BLOCK
YUV TO
RGB
MATRIX
PROGRAMMABLE
LUMINANCE
FILTER
10
PROGRAMMABLE
CHROMINANCE 10
FILTER
REAL-TIME
CONTROL
CIRCUIT
10
10
10
8
4:2:2 TO
8
4:4:4
INTER-
POLATOR
8
Y 8
YCrCb
TO
YUV U 8
MATRIX
V 8
ADD
SYNC
9
INTER-
POLATOR
9
10
U
10
V
10-BIT
DAC
DAC A (PIN 32)
M
U 10
L
T
I 10
P
L
E
X 10
E
R
Programmable LUMA delay
Individual on/off control of each DAC
CCIR and square pixel operation
Integrated subcarrier locking to external video source
Color signal control/burst signal control
Interlaced/noninterlaced operation
Complete on-chip video timing generator
Programmable multimode master/slave operation
Macrovision® AntiTaping Rev. 7.1 (ADV7170 only)
3
Closed captioning support
Teletext insertion port (PAL-WST)
On-board color bar generation
On-board voltage reference
2-wire serial MPU interface (I
2
C®-compatible and Fast I
2
C)
Single supply 5 V or 3.3 V operation
Small 44-lead MQFP/TQFP packages
Industrial temperature grade = −40°C to +85°C
4
APPLICATIONS
High performance DVD playback systems, portable video
equipment including digital still cameras and laptop PCs,
video games, PC video/multimedia and digital
satellite/cable systems (set-top boxes/IRD)
1
ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced
CCIR recommendations).
2
Throughout the document N is referenced to PAL- Combination -N.
3
Protected by U.S. Patents 4,631,603;, 4,577,216, 4,819,098; and other intellectual
property rights. The Macrovision anticopy process is licensed for noncommercial
home use only, which is its sole intended use in the device. Please contact sales
office for latest Macrovision version available.
4
Refer to Table 8 for complete operating details.
V
AA
RESET
COLOR
DATA
P7–P0
P15–P8
CGMS AND WSS
INSERTION
BLOCK
10-BIT
DAC
10-BIT
DAC
10-BIT
DAC
DAC D (PIN 27)
DAC C (PIN 26)
DAC B (PIN 31)
8
ADD
BURST 8
8
INTER-
POLATOR 8
HSYNC
FIELD/VSYNC
BLANK
VIDEO TIMING
GENERATOR
I
2
C MPU PORT
10
SIN/COS
DDS BLOCK
ADV7170/ADV7171
VOLTAGE
REFERENCE
CIRCUIT
GND
V
REF
R
SET
COMP
CLOCK
SCLOCK
SDATA
ALSB
SCRESET/RTC
Figure 1. Functional Block Diagram
Protected by U.S. Patents 5,343,196; 5,442,355; and other intellectual property rights.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
www.analog.com
Tel: 781.329.4700
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.
00221-001
ADV7170/ADV7171
TABLE OF CONTENTS
Specifications..................................................................................... 4
 
Dynamic Specifications ............................................................... 6
 
Timing Specifications .................................................................. 7
 
Timing Diagrams.......................................................................... 9
 
Absolute Maximum Ratings.......................................................... 10
 
Package Thermal Performance ................................................. 10
 
ESD Caution ................................................................................ 10
 
Pin Configuration and Function Descriptions ........................... 11
 
General Description ....................................................................... 13
 
Data Path Description................................................................ 13
 
Internal Filter Response ............................................................. 14
 
Typical Performance Characteristics ........................................... 15
 
Features ............................................................................................ 18
 
Color Bar Generation ................................................................ 18
 
Square Pixel Mode ...................................................................... 18
 
Color Signal Control .................................................................. 18
 
Burst Signal Control ................................................................... 18
 
NTSC Pedestal Control ............................................................. 18
 
Pixel Timing Description .......................................................... 18
 
Subcarrier Reset .......................................................................... 18
 
Real-Time Control ..................................................................... 18
 
Video Timing Description ........................................................ 18
 
Power-On Reset .......................................................................... 26
 
SCH Phase Mode ........................................................................ 26
 
MPU Port Description ............................................................... 26
 
Register Accesses ........................................................................ 27
 
Register Programming ................................................................... 28
 
Subaddress Register (SR7 to SR0) ............................................ 28
 
Register Select (SR5 to SR0) ...................................................... 28
 
Mode Register 0 MR0 (MR07 to MR00) ................................. 28
 
MR0 Bit Description .................................................................. 28
 
Mode Register 1 MR1 (MR17 to MR10) ................................. 30
 
MR1 Bit Description .................................................................. 30
 
Mode Register 2 MR2 (MR27 to MR20) ................................. 30
 
MR2 Bit Description .................................................................. 30
 
Mode Register 3 MR3 (MR37 to MR30) .................................... 32
 
MR3 Bit Description.................................................................... 32
 
Mode Register 4 MR4 (MR47 to MR40) ................................. 33
 
MR4 Bit Description .................................................................. 33
 
VSYNC_3H (MR43) .................................................................. 33
 
Timing Mode Register 0 (TR07 to TR00) ............................... 33
 
TR0 Bit Description ................................................................... 34
 
Timing Mode Register 1 (TR17 to TR10) ............................... 34
 
TR1 Bit Description ................................................................... 34
 
Subcarrier Frequency Registers 0 to 3 (FSC3 to FSC0)......... 35
 
Subcarrier Phase Registers (FP7 to FP0)................................. 35
 
Closed Captioning Even Field Data Register 1 to 0 (CED15 to
CED0) .......................................................................................... 35
 
Closed Captioning Odd Field Data Registers 1 to 0 (CCD15
to CCD0) ..................................................................................... 35
 
NTSC Pedestal/PAL Teletext Control Registers 3 to 0 (PCE15
to PCE0, PCO15 to PCO0)/(TXE15 to TXE0, TXO15 to
TXO0) .......................................................................................... 36
 
Teletext Request Control Register TC07 (TC07 to TC00) .... 36
 
CGMS_WSS Register 0 C/W0 (C/W07 to C/W00) .............. 36
 
C/W0 Bit Description ................................................................ 36
 
CGMS_WSS Register 1 C/W1 (C/W17 to C/W10) .............. 37
 
C/W1 Bit Description ................................................................ 37
 
CGMS Data Bits (C/W17 to C/W16) ...................................... 37
 
CGMS_WSS Register 2 C/W1 (C/W27 to C/W20) .............. 37
 
C/W2 Bit Description ................................................................ 37
 
Appendices ...................................................................................... 38
 
Appendix 1—Board Design and Layout Considerations...... 38
 
Rev. C | Page 2 of 64
ADV7170/ADV7171
Appendix 2—Closed Captioning ..............................................40
 
Appendix 3—Copy Generation Management System
(CGMS) ........................................................................................41
 
Appendix 4—Wide Screen Signaling .......................................42
 
Appendix 5—Teletext Insertion ................................................43
 
Appendix 6—Waveforms ...........................................................44
 
Appendix 7—Optional Output Filter ....................................... 48
 
Appendix 8—Optional DAC Buffering ................................... 48
 
Appendix 9—Recommended Register Values ........................ 49
 
Appendix 10—Output Waveforms ........................................... 51
 
Outline Dimensions ........................................................................ 61
 
Ordering Guide ........................................................................... 62
 
REVISION HISTORY
3/09—Rev. B to Rev. C
Changes to Table 8 ..........................................................................10
Updated Outline Dimensions ........................................................61
Added Figure 103, Renumbered Figures Sequentially ...............61
Changes to Ordering Guide ...........................................................61
6/05—Rev. A to Rev. B
Updated Format.................................................................. Universal
Changes to Features Section ............................................................ 1
Changes to Table 8 ..........................................................................10
Changes to Square Pixel Mode Section ........................................18
Changes to Figure 37 ......................................................................29
Changes to Figure 42 ......................................................................33
Changes to Subcarrier Frequency Registers 3 to 0 Section .......35
Changes to Figure 45 ......................................................................35
Changes to Figure 82 ......................................................................48
Changes to Ordering Guide ...........................................................62
6/02—Starting Rev. A to Rev. B
Changes to Specifications ................................................................. 3
Changes to Package Thermal Performance section...9
Rev. C | Page 3 of 64
ADV7170/ADV7171
SPECIFICATIONS
V
AA
= 5 V ± 5%
1
, V
REF
= 1.235 V, R
SET
= 150 Ω. All specifications T
MIN
to T
MAX 2
, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN
DIGITAL OUTPUTS
Output High Voltage, V
OH
Output Low Voltage, V
OL
Three-State Leakage Current
Three-State Output Capacitance
ANALOG OUTPUTS
Output Current
3
Output Current
4
DAC-to-DAC Matching
Output Compliance, V
OC
Output Impedance, R
OUT
Output Capacitance, C
OUT
VOLTAGE REFERENCE
Reference Range, V
REF
POWER REQUIREMENTS
5
V
AA
Normal Power Mode
I
DAC
(max)
6
I
DAC
(min)
6
I
CCT 7
Low Power Mode
I
DAC
(max)
6
I
DAC
(min)
6
I
CCT7
Sleep Mode
I
DAC 8
I
CCT 9
Power Supply Rejection Ratio
1
2
Conditions
1
Min
Typ
Max
10
Unit
Bits
LSB
LSB
V
V
μA
pF
V
V
μA
pF
mA
mA
%
V
pF
V
V
mA
mA
mA
mA
mA
mA
μA
μA
%/%
R
SET
= 300 Ω
Guaranteed monotonic
2
V
IN
= 0.4 V or 2.4 V
±0.6
±1
0.8
±1
10
I
SOURCE
= 400 μA
I
SINK
= 3.2 mA
2.4
0.4
10
10
R
SET
= 150 Ω, R
L
= 37.5 Ω
R
SET
= 1041 Ω, R
L
= 262.5 Ω
3
34.7
5
1.5
30
37
0
I
OUT
= 0 mA
I
VREFOUT
= 20 μA
1.142
4.75
R
SET
= 150 Ω, R
L
= 37.5 Ω
R
SET
= 1041 Ω, R
L
= 262.5 Ω
1.235
5.0
150
20
75
80
20
75
0.1
0.001
0.01
+1.4
30
1.327
5.25
155
95
95
COMP = 0.1 μF
0.5
The min/max specifications are guaranteed over this range. The min/max values are typical over 4.75 V to 5.25 V.
Ambient temperature range T
MIN
to T
MAX
: −40°C to +85°C. The die temperature, T
J
, must always be kept below 110°C.
3
Full drive into 37.5 Ω doubly terminated load.
4
Minimum drive current (used with buffered/scaled output load).
5
Power measurements are taken with clock frequency = 27 MHz. Max T
J
= 110°C.
6
I
DAC
is the total current (min corresponds to 5 mA output per DAC; max corresponds to 37 mA output per DAC) to drive all four DACs. Turning off individual DACs
reduces I
DAC
correspondingly.
7
I
CCT
(circuit current) is the continuous current required to drive the device.
8
Total DAC current in sleep mode.
9
Total continuous current during sleep mode.
Rev. C | Page 4 of 64
ADV7170/ADV7171
V
AA
= 3.0 V to 3.6 V
1
, V
REF
= 1.235 V, R
SET
= 150 Ω. All specifications T
MIN
to T
MAX 2
, unless otherwise noted.
Table 2.
Parameter
STATIC PERFORMANCE
3
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
DIGITAL INPUTS
3
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
IN3, 4
Input Capacitance, C
IN
DIGITAL OUTPUTS
3
Output High Voltage, V
OH
Output Low Voltage, V
OL
Three-State Leakage Current
Three-State Output Capacitance
ANALOG OUTPUTS
3
Output Current
4, 5
Output Current
6
DAC-to-DAC Matching
Output Compliance, V
OC
Output Impedance, R
OUT
Output Capacitance, C
OUT
POWER REQUIREMENTS
3, 7
V
AA
Normal Power Mode
I
DAC
(max)
8
I
DAC
(min)
8
I
CCT 9
Low Power Mode
I
DAC
(max)
8
I
DAC
(min)
8
I
CCT9
Sleep Mode
I
DAC 10
I
CCT 11
Power Supply Rejection Ratio
1
2
Conditions
1
Min
Typ
Max
10
Unit
Bits
LSB
LSB
V
V
μA
pF
V
V
μA
pF
mA
mA
%
V
pF
V
mA
mA
mA
mA
mA
mA
μA
μA
%/%
R
SET
= 300 Ω
Guaranteed monotonic
2
V
IN
= 0.4 V or 2.4 V
±0.6
±1
0.8
±1
10
I
SOURCE
= 400 μA
I
SINK
= 3.2 mA
2.4
0.4
10
10
R
SET
= 150 Ω, R
L
= 37.5 Ω
R
SET
= 1041 Ω, R
L
= 262.5 Ω
33
34.7
5
2.0
30
37
0
I
OUT
= 0 mA
3.0
R
SET
= 150 Ω, R
L
= 37.5 Ω
R
SET
= 1041 Ω, R
L
= 262.5 Ω
3.3
150
20
35
80
20
35
0.1
0.001
0.01
1.4
30
3.6
155
COMP = 0.1 μF
0.5
The min/max specifications are guaranteed over this range. The min/max values are typical over 3.0 V to 3.6 V.
Ambient temperature range T
MIN
to T
MAX
: −40°C to +85°C. The die temperature, T
J
, must always be kept below 110°C.
3
Guaranteed by characterization.
4
Full drive into 37.5 Ω load.
5
DACs can output 35 mA typically at 3.3 V (R
SET
= 150 Ω and R
L
= 37.5 Ω); optimum performance obtained at 18 mA DAC current (R
SET
= 300 Ω and R
L
= 75 Ω).
6
Minimum drive current (used with buffered/scaled output load).
7
Power measurements are taken with clock frequency = 27 MHz. Max T
J
= 110°C.
8
I
DAC
is the total current (min corresponds to 5 mA output per DAC, max corresponds to 38 mA output per DAC) to drive all four DACs. Turning off individual DACs
reduces I
DAC
correspondingly.
9
I
CCT
(circuit current) is the continuous current required to drive the device.
10
Total DAC current in sleep mode.
11
Total continuous current during sleep mode.
Rev. C | Page 5 of 64
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参数对比
与ADV7171KSU相近的元器件有:ADV7171KSU-REEL。描述及对比如下:
型号 ADV7171KSU ADV7171KSU-REEL
描述 IC COLOR SIGNAL ENCODER, PQFP44, PLASTIC, MS-026ACB, TQFP-44, Color Signal Converter IC COLOR SIGNAL ENCODER, PQFP44, PLASTIC, MS-026ACB, TQFP-44, Color Signal Converter
是否Rohs认证 不符合 不符合
厂商名称 ADI(亚德诺半导体) ADI(亚德诺半导体)
零件包装代码 QFP QFP
包装说明 TQFP, TQFP44,.47SQ,32 PLASTIC, MS-026ACB, TQFP-44
针数 44 44
Reach Compliance Code not_compliant not_compliant
ECCN代码 EAR99 EAR99
其他特性 IT CAN ALSO OPERATE AT 4.75V TO 5.25V SUPPLY IT CAN ALSO OPERATE AT 4.75V TO 5.25V SUPPLY
商用集成电路类型 COLOR SIGNAL ENCODER COLOR SIGNAL ENCODER
输入类型 R-Y; B-Y; Y R-Y; B-Y; Y
JESD-30 代码 S-PQFP-G44 S-PQFP-G44
JESD-609代码 e0 e0
长度 10 mm 10 mm
湿度敏感等级 3 3
功能数量 1 1
端子数量 44 44
最高工作温度 85 °C 85 °C
最低工作温度 -40 °C -40 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TQFP TQFP
封装等效代码 TQFP44,.47SQ,32 TQFP44,.47SQ,32
封装形状 SQUARE SQUARE
封装形式 FLATPACK, THIN PROFILE FLATPACK, THIN PROFILE
峰值回流温度(摄氏度) 240 240
电源 3.3/5 V 3.3/5 V
认证状态 Not Qualified Not Qualified
座面最大高度 1.2 mm 1.2 mm
最大供电电压 (Vsup) 3.6 V 3.6 V
最小供电电压 (Vsup) 3 V 3 V
表面贴装 YES YES
技术 CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL
端子面层 Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
端子形式 GULL WING GULL WING
端子节距 0.8 mm 0.8 mm
端子位置 QUAD QUAD
处于峰值回流温度下的最长时间 30 30
视频标准 PAL; NTSC PAL; NTSC
宽度 10 mm 10 mm
热门器件
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器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
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