AM29LV160MT85WAI,AM29LV160MT85WAI pdf中文资料,AM29LV160MT85WAI引脚图,AM29LV160MT85WAI电路-Datasheet-电子工程世界

文档预览

Am29LV160M

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not available for designs. For new and current designs,

S29GL016A supersedes Am29LV160M and is the factory-recommended migration path. Please refer

to the S29GL016A datasheet for specifications and ordering information. Availability of this docu-

ment is retained for reference and historical purposes only.

The following document contains information on Spansion memory products.

Continuity of Specifications

There is no change to this data sheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal data sheet improvement and are noted in the

document revision summary.

For More Information

Please contact your local sales office for additional information about Spansion memory solutions.

Publication Number

25974

Revision

Amendment

Issue Date

January 31, 2007

THIS PAGE LEFT INTENTIONALLY BLANK.

Am29LV160M

16 Megabit (2 M x 8-Bit/1 M x 16-Bit) MirrorBit

3.0 Volt-only Boot Sector Flash Memory

This product has been retired and is not available for designs. For new and current designs, S29GL016A supersedes Am29LV160M and is the factory-recom-

mended migration path. Please refer to the S29GL016A datasheet for specifications and ordering information. Availability of this document is retained for

reference and historical purposes only.

Distinctive Characteristics

Architectural Advantages

Single power supply operation

— 3 V for read, erase, and program operations

Manufactured on 0.23 µm MirrorBit

process

technology

— Fully compatible with Am29LV160D device

Secured Silicon Sector region

— 128-word/256-byte sector for permanent, secure

identification through an 8-word/16-byte random

Electronic Serial Number, accessible through a

command sequence

— May be programmed and locked at the factory or by

the customer

Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and thirty-

one 64 Kbyte sectors (byte mode)

— One 8 Kword, two 4 Kword, one 16 Kword, and thirty-

one 32 Kword sectors (word mode)

Compatibility with JEDEC standards

— Provides pinout and software compatibility for single-

power supply flash, and superior inadvertent write

protection

Top or bottom boot block configurations available

Minimum 100,000 erase cycle guarantee per sector

20-year data retention at 125°C

Low power consumption (typical values at 5 MHz)

— 400 nA standby mode current

— 15 mA read current

— 40 mA program/erase current

— 400 nA Automatic Sleep mode current

Package options

— 48-ball Fine-pitch BGA

— 64-ball Fortified BGA

— 48-pin TSOP

Software Features

— Program Suspend & Resume: read other sectors

before programming operation is completed

— Erase Suspend & Resume: read/program other

sectors before an erase operation is completed

— Data# polling & toggle bits provide status

— Unlock Bypass Program command reduces overall

multiple-word programming time

— CFI (Common Flash Interface) compliant: allows host

system to identify and accommodate multiple flash

devices

Hardware Features

— Sector Protection: hardware-level method of

preventing write operations within a sector

— Temporary Sector Unprotect: V

-level method of

changing code in locked sectors

— Hardware reset input (RESET#) resets device

— Ready/Busy# output (RY/BY#) indicates program or

erase cycle completion

Performance Characteristics

High performance

— Access times as fast as 70 ns

— 0.7 s typical sector erase time

Publication Number

25974

Revision

Amendment

Issue Date

January 31, 2007

This Data Sheet states AMD’s current specifications regarding the Products described herein. This Data Sheet may be revised by subsequent versions or modifications

due to changes in technical specifications.

D a t a

S h e e t

General Description

The Am29LV160M is a 16 Mbit, 3.0 Volt-only Flash memory organized as

2,097,152 bytes or 1,048,576 words. The device is offered in a 48-ball Fine-pitch

BGA, 64-ball Fortified BGA, and 48-pin TSOP packages. The word-wide data (x16)

appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. The de-

vice requires only a

single 3.0 volt power supply

for both read and write

functions, designed to be programmed in-system with the standard system 3.0

volt V

supply. The device can also be programmed in standard

EPROM programmers.

The device offers access times of 70, 85, 90, and 100 ns. To eliminate bus conten-

tion the device contains separate chip enable (CE#), write enable (WE#) and

output enable (OE#) controls.

The device is entirely command set compatible with the

JEDEC single-power-

supply Flash standard.

Commands are written to the device using standard

microprocessor write timing. Write cycles also internally latch addresses and data

needed for the programming and erase operations.

The

sector erase architecture

allows memory sectors to be erased and repro-

grammed without affecting the data contents of other sectors. The device is fully

erased when shipped from the factory.

Device programming and erasure are initiated through command sequences.

Once a program or erase operation starts, the host system need only poll the

DQ7 (Data# Polling) or DQ6 (toggle)

status bits

or monitor the

Ready/Busy#

(RY/BY#)

output to determine whether the operation is complete. To facilitate

programming, an

Unlock Bypass

mode reduces command sequence overhead

by requiring only two write cycles to program data instead of four.

Hardware data protection

measures include a low V

detector that automati-

cally inhibits write operations during power transitions. The hardware sector

protection feature disables both program and erase operations in any combina-

tion of sectors of memory. This can be achieved in-system or via programming

equipment.

The

Erase Suspend/Erase Resume

feature allows the host system to pause an

erase operation in a given sector to read or program any other sector and then

complete the erase operation. The

Program Suspend/Program Resume

fea-

ture enables the host system to pause a program operation in a given sector to

read any other sector and then complete the program operation.

The

hardware RESET# pin

terminates any operation in progress and resets the

device, after which it is then ready for a new operation. The RESET# pin may be

tied to the system reset circuitry. A system reset would thus also reset the de-

vice, enabling the host system to read boot-up firmware from the Flash memory

device.

The device reduces power consumption in the

standby mode

when it detects

specific voltage levels on CE# and RESET#, or when addresses are stable for a

specified period of time.

The

Secured Silicon Sector

provides a 128-word/256-byte area for code or

data that can be permanently protected. Once this sector is protected, no further

changes within the sector can occur.

MirrorBit flash technology combines years of Flash memory manufacturing expe-

rience to produce the highest levels of quality, reliability and cost effectiveness.

The device electrically erases all bits within a sector simultaneously via hot-hole

assisted erase. The data is programmed using hot electron injection.

Am29LV160M

25974B5 January 31, 2007

D a t a

S h e e t

Table of Contents

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10

Table 1. Am29LV160M Device Bus Operations .......................10

DQ7: Data# Polling .............................................................................. 33

Figure 7. Data# Polling Algorithm ....................................... 34

RY/BY#: Ready/Busy# ..........................................................................34

DQ6: Toggle Bit I .................................................................................. 35

DQ2: Toggle Bit II ................................................................................. 35

Reading Toggle Bits DQ6/DQ2 ........................................................36

Figure 8. Toggle Bit Algorithm ............................................ 37

Word/Byte Configuration .................................................................. 10

Requirements for Reading Array Data ........................................... 10

Writing Commands/Command Sequences .....................................11

Program and Erase Operation Status ...............................................11

Standby Mode ...........................................................................................11

Automatic Sleep Mode .........................................................................12

RESET#: Hardware Reset Pin .............................................................12

Output Disable Mode ...........................................................................12

Table 2. Sector Address Tables (Am29LV160MT) ...................13

Table 3. Sector Address Tables (Am29LV160MB) ...................14

DQ5: Exceeded Timing Limits .......................................................... 37

DQ3: Sector Erase Timer ...................................................................38

Table 12. Write Operation Status ........................................ 38

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . .39

Figure 9. Maximum Negative Overshoot Waveform ............... 39

Figure 10. Maximum Positive Overshoot Waveform ............... 39

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 39

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 40

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 11. Test Setup........................................................ 41

Table 13. Test Specifications .............................................. 41

Figure 12. Input Waveforms and Measurement Levels ........... 41

Autoselect Mode ....................................................................................15

Table 4. Autoselect Codes (High Voltage Method) ..................15

Sector Protection/Unprotection .......................................................15

Temporary Sector Unprotect ............................................................16

Figure 1. Temporary Sector Unprotect Operation................... 16

Figure 2. In-System Single High Voltage Sector Protect/

Unprotect Algorithms ........................................................ 17

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .42

Read Operations ...................................................................................42

Figure 13. Read Operations Timings.................................... 42

Hardware Reset (RESET#) .................................................................43

Figure 14. RESET# Timings ............................................... 43

Secured Silicon Sector Flash Memory Region .............................. 18

Table 5. Secured Silicon Sector Addressing ...........................18

Word/Byte Configuration (BYTE#) ..............................................44

Figure 15. BYTE# Timings for Read Operations..................... 44

Figure 16. BYTE# Timings for Write Operations .................... 44

Customer Lockable: Secured Silicon Sector NOT Programmed

or Protected At the Factory .............................................................. 18

Figure 3. Secured Silicon Sector Protect Verify ...................... 19

Erase/Program Operations ................................................................45

Figure 17. Program Operation Timings ................................

Figure 18. Chip/Sector Erase Operation Timings ...................

Figure 19. Data# Polling Timings

(During Embedded Algorithms) ..........................................

Figure 20. Toggle Bit Timings

(During Embedded Algorithms) ..........................................

Figure 21. DQ2 vs. DQ6 for Erase and

Erase Suspend Operations .................................................

Figure 22. Temporary Sector Unprotect/Timing Diagram........

Figure 23. Sector Protect/Unprotect Timing Diagram .............

Figure 24. Alternate CE# Controlled Write Operation Timings .

Common Flash Memory Interface (CFI) ....................................... 20

Table 6. CFI Query Identification String ...............................20

Table 7. System Interface String .........................................21

Table 8. Device Geometry Definition ....................................21

Table 9. Primary Vendor-Specific Extended Query .................22

Hardware Data Protection ................................................................22

Low V

Write Inhibit ........................................................................22

Write Pulse “Glitch” Protection ......................................................22

Logical Inhibit ..........................................................................................23

Power-Up Write Inhibit ......................................................................23

Command Definitions . . . . . . . . . . . . . . . . . . . . . . 23

Reading Array Data ..............................................................................23

Reset Command ....................................................................................23

Autoselect Command Sequence ......................................................24

Word/Byte Program Command Sequence ...................................24

Unlock Bypass Command Sequence ...............................................25

Figure 4. Program Operation .............................................. 26

Chip Erase Command Sequence ......................................................26

Sector Erase Command Sequence ...................................................27

Erase Suspend/Erase Resume Commands .....................................27

Figure 5. Erase Operation .................................................. 29

Erase and Programming Performance . . . . . . . . .53

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 53

TSOP Pin and BGA Package Capacitance . . . . . 53

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . .54

TS 048—48-Pin Standard TSOP ......................................................54

TSR048—48-Pin Reverse TSOP ......................................................55

FBA048—48-Ball Fine-Pitch Ball Grid Array (BGA)

6 x 8 mm Package .................................................................................56

LAA064—64-Ball Fortified Ball Grid Array (BGA)

13 x 11 mm Package ................................................................................57

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 58

Program Suspend/Program Resume Command Sequence .......29

Figure 6. Program Suspend/Program Resume ....................... 30

Command Definitions Tables .............................................................31

Write Operation Status . . . . . . . . . . . . . . . . . . . . 33

January 31, 2007 25974B5

Am29LV160M