numbers reflect the limitations of the test circuit rather than the
device itself.
IS
≤
-
ID
38A
di
/
dt
≤
700A/µs
VR
≤
800
TJ
≤
150
°
C
6 Eon includes diode reverse recovery. See figures 18, 20.
Microsemi reserves the right to change, without notice, the specifications and information contained herein.
0.16
0.9
0.7
0.12
0.5
0.08
0.3
0.04
0.1
0.05
0
10
-5
10
-4
SINGLE PULSE
5-2006
Note:
PDM
t1
t2
Duty Factor D = t1/t
2
Peak TJ = PDM x Z
θJC
+ TC
050-7078 Rev C
10
-3
10
-2
10
-1
RECTANGULAR PULSE DURATION (SECONDS)
FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
1.0
Typical Performance Curves
100
VGS =15 &10 V
APT8020B2_LFLL
8V
7V
I
D
, DRAIN CURRENT (AMPERES)
80
T
J
( C)
0.0271
Dissipated Power
(Watts)
0.00899
0.0202
0.293
0.0656
T
C
( C)
0.0860
60
6.5V
40
6V
20
5.5V
5V
0
5
10
15
20
25
30
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS
1.40
V
GS
Z
EXT
are the external thermal
impedances: Case to sink,
sink to ambient, etc. Set to
zero when modeling only
the case to junction.
Z
EXT
0
R
DS
(ON), DRAIN-TO-SOURCE ON RESISTANCE
FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL
120
100
80
60
40
20
0
TJ = +125°C
TJ = -55°C
TJ = +25°C
VDS> ID (ON) x RDS (ON)MAX.
250µSEC. PULSE TEST
@ <0.5 % DUTY CYCLE
NORMALIZED TO
= 10V @ I = 19A
D
I
D
, DRAIN CURRENT (AMPERES)
1.30
1.20
1.10
1.00
0.90
0.80
VGS=10V
VGS=20V
0
2
4
6
8
10
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 4, TRANSFER CHARACTERISTICS
0
40
35
I
D
, DRAIN CURRENT (AMPERES)
BV
DSS
, DRAIN-TO-SOURCE BREAKDOWN
VOLTAGE (NORMALIZED)
1.15
10
20
30
40
50 60 70
80
I
D
, DRAIN CURRENT (AMPERES)
FIGURE 5, R
DS
(ON) vs DRAIN CURRENT
30
25
20
15
10
5
0
25
1.10
1.05
1.00
0.95
R
DS
(ON), DRAIN-TO-SOURCE ON RESISTANCE
(NORMALIZED)
50
75
100
125
150
T
C
, CASE TEMPERATURE (°C)
FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE
2.5
I
V
D
0.90
-50
-25
0
25
50 75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-50
= 19A
= 10V
2.0
1.5
1.0
V
GS
(TH), THRESHOLD VOLTAGE
(NORMALIZED)
GS
0.5
0.0
-50
-25
0
25 50
75 100 125 150
T
J
, JUNCTION TEMPERATURE (°C)
-25
0
25
50
75 100 125 150
T
C
, CASE TEMPERATURE (°C)
050-7078 Rev C
5-2006
Typical Performance Curves
152
100
I
D
, DRAIN CURRENT (AMPERES)
OPERATION HERE
LIMITED BY RDS (ON)
20,000
10,000
APT8020B2_LFLL
50
C, CAPACITANCE (pF)
Ciss
100µS
10
1,000
Coss
1mS
TC =+25°C
TJ =+150°C
SINGLE PULSE
1
10
100
800
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 10, MAXIMUM SAFE OPERATING AREA
I
D
1
10mS
100
Crss
0
10
20
30
40
50
V
DS
, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE
I
DR
, REVERSE DRAIN CURRENT (AMPERES)
V
GS
, GATE-TO-SOURCE VOLTAGE (VOLTS)
16
= 38A
200
100
TJ =+150°C
TJ =+25°C
10
12
VDS=160V
8
VDS=400V
VDS=640V
4
50
100
150
200
250
Q
g
, TOTAL GATE CHARGE (nC)
FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE
200
180
160
t
d(off)
0
0
1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
V
SD
, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE
100
V
DD
G
= 533V
R
= 5Ω
80
V
DD
G
T = 125°C
J
L = 100µH
t
d(on)
and t
d(off)
(ns)
140
120
100
80
60
40
20
0
10
= 533V
R
= 5Ω
T = 125°C
J
L = 100µH
t
r
and t
f
(ns)
60
t
f
40
t
r
t
d(on)
20
I
D
(A)
FIGURE 14, DELAY TIMES vs CURRENT
DD
G
20
30
40
50
60
2500
V
= 533V
40
50
60
I
D
(A)
FIGURE 15, RISE AND FALL TIMES vs CURRENT
6000
V
I
DD
0
10
20
30
= 533V
R
= 5Ω
SWITCHING ENERGY (µJ)
2000
SWITCHING ENERGY (µJ)
T = 125°C
J
5000
4000
3000
2000
1000
0
D
J
= 38A
T = 125°C
L = 100µH
E
ON
includes
diode reverse recovery.
L = 100µH
E
ON
includes
diode reverse recovery.
E
off
1500
E
on
1000
E
off
E
on
5-2006
500
050-7078 Rev C
I
D
(A)
FIGURE 16, SWITCHING ENERGY vs CURRENT
0
10
20
30
40
50
60
10 15 20 25 30 35 40 45 50
R
G
, GATE RESISTANCE (Ohms)
FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE
0
5
Typical Performance Curves
90%
APT8020B2_LFLL
10%
Gate Voltage
T 125°C
J
Gate Voltage
T
J
125°C
t
d(on)
t
r
90%
5%
10%
Switching Energy
5%
Drain Voltage
Drain Current
t
d(off)
90%
Drain Voltage
t
f
10%
0
Drain Current
Switching Energy
Figure 18, Turn-on Switching Waveforms and Definitions
Figure 19, Turn-off Switching Waveforms and Definitions
APT30DF100
V
DD
I
D
V
DS
G
D.U.T.
Figure 20, Inductive Switching Test Circuit
T-MAX
TM
(B2) Package Outline
4.69 (.185)
5.31 (.209)
1.49 (.059)
2.49 (.098)
15.49 (.610)
16.26 (.640)
5.38 (.212)
6.20 (.244)
TO-264 (L) Package Outline
4.60 (.181)
5.21 (.205)
1.80 (.071)
2.01 (.079)
19.51 (.768)
20.50 (.807)
3.10 (.122)
3.48 (.137)
5.79 (.228)
6.20 (.244)
Drain
20.80 (.819)
21.46 (.845)
Drain
25.48 (1.003)
26.49 (1.043)
4.50 (.177) Max.
0.40 (.016)
0.79 (.031)
2.87 (.113)
3.12 (.123)
1.65 (.065)
2.13 (.084)
2.29 (.090)
2.69 (.106)
19.81 (.780)
21.39 (.842)
2.29 (.090)
2.69 (.106)
1.01 (.040)
1.40 (.055)
Gate
Drain
Source
0.48 (.019)
0.84 (.033)
2.59 (.102)
3.00 (.118)
Source
0.76 (.030)
1.30 (.051)
2.79 (.110)
3.18 (.125)
5.45 (.215) BSC
2-Plcs.
2.21 (.087)
2.59 (.102)
5.45 (.215) BSC
2-Plcs.
These dimensions are equal to the TO-247 without the mounting hole.
Dimensions in Millimeters and (Inches)
Dimensions in Millimeters and (Inches)
Microsemi’s products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103
5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved.
本文将介绍STM32F4时钟配置的操作步骤、并对比时钟配置前后LED外设闪烁的快慢以及对应代码的讲解 一、使用默认时钟配置去执行代码、获取LED闪烁的周期 如下图所示我们默认使用的是HSI（内部高速时钟）且不进行任何配置 最后我们系统时钟、以及外设获得的时钟频率为16MHz 主函数中的代码如下： int main(void) { /* USER CODE BEGIN 1 */ ...[详细]
51单片机
