Features
•
Fast Read Access Time – 55 ns
•
Low-power CMOS Operation
– 100 µA Max Standby
– 25 mA Max Active at 5 MHz
JEDEC Standard Packages
– 32-lead PDIP
– 32-lead PLCC
– 32-lead TSOP
5V
±
10% Supply
High-reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latch-up Immunity
Rapid Programming Algorithm – 100 µs/Byte (Typical)
CMOS- and TTL-compatible Inputs and Outputs
Integrated Product Identification Code
Industrial and Automotive Temperature Ranges
Green (Pb/Halide-free) Packaging Option
•
•
•
•
•
•
•
•
2-megabit
(256K x 8)
OTP EPROM
AT27C020
1. Description
The AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time program-
mable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only
one 5V power supply in normal read mode operation. Any byte can be accessed
in less than 55 ns, eliminating the need for speed-reducing WAIT states on high-
performance microprocessor systems.
In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current
is typically less than 10 µA.
The AT27C020 is available in a choice of industry-standard JEDEC-approved one-
time programmable (OTP) plastic PDIP, PLCC and TSOP packages. All devices fea-
ture two-line control (CE, OE) to give designers the flexibility to prevent bus
contention.
With 256K bytes storage capability, the AT27C020 allows firmware to be stored reli-
ably and to be accessed by the system without the delays of mass storage media.
Atmel’s AT27C020 has additional features to ensure high quality and efficient produc-
tion use. The Rapid Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
0570G–EPROM–12/07
2. Pin Configurations
Pin Name
A0 - A17
O0 - O7
CE
OE
PGM
Function
Addresses
Outputs
Chip Enable
Output Enable
Program Strobe
2.1
32-lead PLCC Top View
2.3
32-lead TSOP (Type 1) Top View
A12
A15
A16
VPP
VCC
PGM
A17
2.2
32-lead PDIP Top View
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
01
02
GND
03
04
05
06
14
15
16
17
18
19
20
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A14
A13
A8
A9
A11
OE
A10
CE
07
A11
A9
A8
A13
A14
A17
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
07
06
05
04
03
GND
02
01
O0
A0
A1
A2
A3
4
3
2
1
32
31
30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
PGM
A17
A14
A13
A8
A9
A11
OE
A10
CE
07
06
05
04
03
2
AT27C020
0570G–EPROM–12/07
AT27C020
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high-
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
CC
and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply-voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
CC
and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
5. Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Note:
1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns.
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
3
0570G–EPROM–12/07
6. Operating Modes
Mode/Pin
Read
Output Disable
Standby
Rapid Program
(2)
PGM Verify
PGM Inhibit
Product Identification
(4)
Notes:
1. X can be V
IL
or V
IH
.
2. Refer to Programming Characteristics.
3. V
H
= 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
) except A9, which is set to V
H
and A0, which is toggled
low (V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.
CE
V
IL
X
V
IH
V
IL
V
IL
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
X
V
IL
PGM
X
(1)
X
X
V
IL
V
IH
X
X
Ai
Ai
X
X
Ai
Ai
X
A9 = V
H(3)
A0 = V
IH
or V
IL
A1 - A17 = V
IL
V
PP
X
X
X
V
PP
V
PP
V
PP
X
Outputs
D
OUT
High-Z
High-Z
D
IN
D
OUT
High-Z
Identification Code
7. DC and AC Operating Conditions for Read Operation
AT27C020
-55
Ind.
Operating Temperature (Case)
Auto.
V
CC
Power Supply
5V
±
10%
-40° C - 125° C
5V
±
10%
-40° C - 85° C
-90
-40° C - 85° C
8. DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP(2)
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
Parameter
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
V
CC(1)
Standby Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
I
OL
= 2.1 mA
I
OH
= -400 µA
2.4
Condition
V
IN
= 0V to V
CC
(Com., Ind.)
V
OUT
= 0V to V
CC
(Com., Ind.)
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
-0.6
2.0
Min
Max
±1.0
±5.0
±10
100
1.0
25
0.8
V
CC
+ 0.5
0.4
Units
µA
µA
µA
µA
mA
mA
V
V
V
V
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. V
PP
may be connected directly to V
CC
except during programming. The supply current would then be the sum of I
CC
and I
PP
.
4
AT27C020
0570G–EPROM–12/07
AT27C020
9. AC Characteristics for Read Operation
AT27C020
-55
Symbol
t
ACC(3)
t
CE(2)
t
OE(2)(3)
t
DF(4)(5)
t
OH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
Whichever Occurred First
Output Hold from Address, CE or OE,
Whichever Occurred First
7
Condition
CE = OE
= V
IL
OE = V
IL
CE = V
IL
Min
Max
55
55
20
18
0
Min
-90
Max
90
90
35
20
Units
ns
ns
ns
ns
ns
10. AC Waveforms for Read Operation
(1)
Notes:
1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
3. OE may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5
0570G–EPROM–12/07
