Technical Datasheet
TPR0327I
AT90SCR100/200
Table of Contents
General Features.....................................................................................8
1
2
3
4
5
Block Diagram ......................................................................................11
Pin List Configuration .........................................................................12
Resources .............................................................................................16
About Code Examples .........................................................................17
8/16-bit RISC CPU Core .......................................................................18
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
Introduction .......................................................................................................18
Architectural Overview .....................................................................................18
ALU – Arithmetic Logic Unit .............................................................................19
Status Register .................................................................................................20
General Purpose Register File .........................................................................21
Stack Pointer ....................................................................................................22
Instruction Execution Timing ............................................................................22
Reset and Interrupt Handling ...........................................................................23
6
AT90SCR100/200 Memories ................................................................26
6.1
6.2
6.3
6.4
In-System Reprogrammable Flash Program Memory ......................................26
SRAM Data Memory ........................................................................................27
EEPROM Data Memory ...................................................................................28
I/O Memory .......................................................................................................34
7
Clock System .......................................................................................36
7.1
7.2
7.3
7.4
Overview ..........................................................................................................36
Clock Sources ..................................................................................................38
Clock Output Buffer ..........................................................................................43
Clock System Registers ...................................................................................43
8
Power Management and Sleep Modes ...............................................46
8.1
8.2
8.3
8.4
Power Modes Descriptions ...............................................................................46
Power Reduction Register ................................................................................48
Important note about: Entering and Leaving low consumption modes .............51
Minimizing Power Consumption .......................................................................51
9
System Control and Reset ..................................................................53
9.1
Resetting the 8/16-bit RISC CPU .....................................................................53
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AT90SCR100/200
9.2
9.3
9.4
9.5
9.6
Reset Sources ..................................................................................................53
Internal Voltage Reference ...............................................................................57
Supply monitor .................................................................................................57
Watchdog Timer ...............................................................................................59
Register Description .........................................................................................62
10 Interrupts ..............................................................................................65
10.1
Interrupt Vectors in AT90SCR100/200 .............................................................65
11 External Interrupts ...............................................................................71
11.1
External Interrupt Registers ..............................................................................71
12 I/O Ports ................................................................................................77
12.1
12.2
12.3
12.4
12.5
Standard IO Ports .............................................................................................77
Specific Low Speed Keyboard Output ..............................................................78
LED ..................................................................................................................78
Ports as General Digital I/O ..............................................................................79
Register Description for I/O-Ports ....................................................................85
13 Timers ...................................................................................................88
13.1
13.2
13.3
13.4
8-bit Timer/Counter0 with PWM .......................................................................88
16-bit Timer/Counter1 with PWM ...................................................................106
8-bit Timer/Counter2 with PWM and Asynchronous Operation (RTC) ...........135
Timer/Counter Prescaler ................................................................................155
14 USB Device Interface .........................................................................157
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
Features .........................................................................................................157
Overview ........................................................................................................157
Endpoints Description ....................................................................................159
Attachment Procedure ....................................................................................160
USB Interrupts ................................................................................................160
Suspend and Resume Modes ........................................................................161
Double Buffering .............................................................................................163
USB Device Registers Description .................................................................165
USBDMA Controller .......................................................................................173
15 Smart Card Interface Block (SCIB) ...................................................178
15.1
15.2
15.3
Features .........................................................................................................178
Overview ........................................................................................................178
Block Diagram ................................................................................................178
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15.4
15.5
15.6
15.7
15.8
Definitions .......................................................................................................179
Functional Description ....................................................................................181
Additional Features ........................................................................................190
SCI registers access ......................................................................................193
Smart Card Interface Block Registers ............................................................194
16 DC/DC Converter ................................................................................205
16.1
16.2
16.3
16.4
16.5
Overview ........................................................................................................205
Features .........................................................................................................205
Description .....................................................................................................205
Summary: State Machine ...............................................................................206
DC/DC Registers ............................................................................................207
17 USB Host Controller ..........................................................................208
17.1
17.2
17.3
17.4
17.5
17.6
17.7
Features .........................................................................................................208
USB Host Smart Card Interface Description ..................................................208
USB-IC Design ...............................................................................................209
Memory Management ....................................................................................210
USB Host Controller Description ....................................................................211
Interrupt system ..............................................................................................218
USB Host Controller Registers .......................................................................219
18 USART .................................................................................................233
18.1
18.2
18.3
18.4
18.5
18.6
18.7
18.8
18.9
18.10
18.11
18.12
Features .........................................................................................................233
USART0 .........................................................................................................233
Overview ........................................................................................................233
Clock Generation ............................................................................................234
Frame Formats ...............................................................................................237
USART Initialization .......................................................................................238
Data Transmission – The USART Transmitter ...............................................240
Data Reception – The USART Receiver ........................................................242
Asynchronous Data Reception .......................................................................246
Multi-processor Communication Mode ...........................................................249
USART Register Description ..........................................................................251
Examples of Baud Rate Setting .....................................................................256
19 USART in SPI Mode ...........................................................................258
19.1
19.2
Features .........................................................................................................258
Overview ........................................................................................................258
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19.3
19.4
19.5
19.6
19.7
19.8
Clock Generation ............................................................................................258
SPI Data Modes and Timing ..........................................................................259
Frame Formats ...............................................................................................259
Data Transfer .................................................................................................261
USART MSPIM Register Description .............................................................263
8/16-bit RISC CPU USART MSPIM vs. 8/16-bit RISC CPU SPI ....................266
20 SPI - Serial Peripheral Interface ........................................................267
20.1
20.2
20.3
20.4
20.5
Features .........................................................................................................267
Description .....................................................................................................267
SS Pin Functionality .......................................................................................272
SPI Registers .................................................................................................272
Data Modes ....................................................................................................275
21 High-Speed SPI Controller ................................................................276
21.1
21.2
21.3
21.4
21.5
21.6
Features .........................................................................................................276
Description .....................................................................................................276
HSSS line Functionality ..................................................................................285
Data Modes ....................................................................................................285
HSSPI Interface Registers .............................................................................286
HSSPIDMA Controller ....................................................................................291
22 2-wire Serial Interface _ TWI .............................................................296
22.1
22.2
22.3
22.4
22.5
22.6
22.7
22.8
22.9
Features .........................................................................................................296
TWI Serial Interface Bus Definition ................................................................296
Data Transfer and Frame Format ...................................................................297
Multi-master Bus Systems, Arbitration and Synchronization ..........................300
Overview of the TWI Module ..........................................................................301
Using the TWI .................................................................................................304
Transmission Modes ......................................................................................307
Multi-master Systems and Arbitration ............................................................322
TWI Register Description ...............................................................................323
23 Random Number Generator ..............................................................328
23.1
23.2
23.3
Features .........................................................................................................328
RNG Definition ...............................................................................................328
Random Number Generator Registers ...........................................................329
24 Keyboard Interface ............................................................................331
24.1
Features .........................................................................................................331
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AT90SCR100/200
