Features
•
Low-voltage and Standard-voltage Operation
•
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free
Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP,
and 8-ball dBGA2
™
Packages
•
•
•
•
•
•
Three-wire
Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
Description
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable pro-
grammable read-only memory (EEPROM), organized as 64/128/256 words of 16 bits
each (when the ORG pin is connected to VCC), and 128/256/512 words of 8 bits each
(when the ORG pin is tied to ground). The device is optimized for use in many indus-
trial and commercial applications where low-power and low-voltage operations are
essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP, 8-lead
JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, and 8-lead dBGA2™
packages.
The AT93C46/56/66 is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46/56/66 is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
Table 1.
Pin Configurations
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
DC
Function
Chip Select
Serial Data Clock
Serial Data Input
8-lead
PDIP
CS
SK
DI
DO
AT93C46
AT93C56
(1)
AT93C66
(2)
Note: 1. This device is not recom-
mended for new designs.
Please refer to AT93C56A.
2. This device is not recom-
mended for new designs.
Please refer to AT93C66A.
8-lead SOIC
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
8-lead
dBGA2
VCC
DC
ORG
GND
8
7
6
5
1
2
3
4
CS
SK
D1
D0
Serial Data Output
Ground
Power Supply
Internal Organization
Don’t Connect
VCC
DC
ORG
GND
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
DC
VCC
CS
SK
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
1
2
3
4
8
7
6
5
ORG
GND
DO
DI
8-lead
MAP
8
7
6
5
1
2
3
4
8-lead
TSSOP
CS
SK
DI
DO
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
Rev. 0172Y–SEEPR–11/04
1
Absolute Maximum Ratings*
Operating Temperature......................................−55°C to +125°C
Storage Temperature
.........................................−65°C
to +150°C
Voltage on Any Pin
with Respect to Ground
........................................ −1.0V
to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Figure 1.
Block Diagram
Note:
When the ORG pin is connected to VCC, the “x 16” organization is selected. When it is
connected to ground, the “x 8” organization is selected. If the ORG pin is left uncon-
nected and the application does not load the input beyond the capability of the internal 1
Meg ohm pullup, then the “x 16” organization is selected. The feature is not available on
the 1.8V devices.
For the AT93C46, if “x 16” organization is the mode of choice and Pin 6 (ORG) is left
unconnected, Atmel recommends using the AT93C46A device. For more details, see the
AT93C46A datasheet.
2
AT93C46/56/66
0172Y–SEEPR–11/04
AT93C46/56/66
Table 2.
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted)
Symbol
C
OUT
C
IN
Note:
Test Conditions
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
1. This parameter is characterized and is not 100% tested.
Max
5
5
Units
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
Table 3.
DC Characteristics
Applicable over recommended operating range from: T
AI
=
−40°C
to +85°C, V
CC
= +1.8V to +5.5V,
T
AE
= -40°C to +125°C, V
CC
= +1.8V to +5.5V (unless otherwise noted)
Symbol
V
CC1
V
CC2
V
CC3
I
CC
I
SB1
I
SB2
I
SB3
I
IL
I
OL
V
IL1(1)
V
IH1(1)
V
IL2(1)
V
IH2(1)
V
OL1
V
OH1
V
OL2
V
OH2
Note:
Parameter
Supply Voltage
Supply Voltage
Supply Voltage
READ at 1.0 MHz
Supply Current
Standby Current
Standby Current
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
V
CC
= 5.0V
V
CC
= 1.8V
V
CC
= 2.7V
V
CC
= 5.0V
V
IN
= 0V to V
CC
V
IN
= 0V to V
CC
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
2.7V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
2.7V
I
OL
= 2.1 mA
I
OH
=
−
0.4 mA
I
OL
= 0.15 mA
I
OH
=
−
100 µA
V
CC
– 0.2
2.4
0.2
WRITE at 1.0 MHz
CS = 0V
CS = 0V
CS = 0V
Test Condition
Min
1.8
2.7
4.5
0.5
0.5
0
6.0
17
0.1
0.1
Typ
Max
5.5
5.5
5.5
2.0
2.0
0.1
10.0
30
1.0
1.0
0.8
V
V
CC
+ 1
V
CC
x 0.3
V
CC
+ 1
0.4
V
V
V
V
V
Unit
V
V
V
mA
mA
µA
µA
µA
µA
µA
−
0.6
2.0
−
0.6
V
CC
x 0.7
1. V
IL
min and V
IH
max are reference only and are not tested.
3
0172Y–SEEPR–11/04
Table 4.
AC Characteristics
Applicable over recommended operating range from T
AI
=
−40°C
to + 85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
f
SK
SK Clock
Frequency
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
Relative to SK
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
2.7V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
5.5V
4.5V
≤
V
CC
≤
5.5V
0
0
0
250
250
1000
250
250
1000
250
250
1000
50
50
200
100
100
400
0
100
100
400
2
1
0.25
MHz
t
SKH
SK High Time
ns
t
SKL
SK Low Time
ns
t
CS
Minimum CS
Low Time
ns
t
CSS
CS Setup Time
ns
t
DIS
t
CSH
t
DIH
DI Setup Time
CS Hold Time
DI Hold Time
Relative to SK
Relative to SK
Relative to SK
ns
ns
ns
250
250
1000
250
250
1000
250
250
1000
100
100
400
10
t
PD1
Output Delay to
“1”
Output Delay to
“0”
CS to Status
Valid
CS to DO in High
Impedance
AC Test
ns
t
PD0
AC Test
ns
t
SV
AC Test
ns
t
DF
AC Test
CS = V
IL
ns
ms
ms
Write Cycles
t
WP
Endurance
(1)
Note:
Write Cycle Time
5.0V, 25°C
0.1
1M
3
1. This parameter is characterized and is not 100% tested.
4
AT93C46/56/66
0172Y–SEEPR–11/04
AT93C46/56/66
Table 5.
Instruction Set for the AT93C46
Op
Code
10
00
11
01
00
00
00
Address
x8
A
6
– A
0
11XXXXX
A
6
– A
0
A
6
– A
0
10XXXXX
01XXXXX
00XXXXX
x 16
A
5
– A
0
11XXXX
A
5
– A
0
A
5
– A
0
10XXXX
01XXXX
00XXXX
D
7
– D
0
D
15
– D
0
D
7
– D
0
D
15
– D
0
x8
Data
x 16
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erases memory location A
n
– A
0
Writes memory location A
n
– A
0
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
Disables all programming instructions
Instruction
READ
EWEN
ERASE
WRITE
ERAL
WRAL
EWDS
Note:
SB
1
1
1
1
1
1
1
The Xs in the address field represent
DON’T CARE
values and must be clocked.
Table 6.
Instruction Set for the AT93C56
(1)
and AT93C66
(2)
Op
Code
10
00
11
01
00
Address
x8
A
8
– A
0
11XXXXXXX
A
8
– A
0
A
8
– A
0
10XXXXXXX
x 16
A
7
– A
0
11XXXXXX
A
7
– A
0
A
7
– A
0
10XXXXXX
D
7
– D
0
D
15
– D
0
x8
Data
x 16
Comments
Reads data stored in memory, at
specified address
Write enable must precede all
programming modes
Erases memory location A
n
– A
0
Writes memory location A
n
– A
0
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V
D
7
– D
0
D
15
– D
0
Writes all memory locations. Valid
only at V
CC
= 5.0V ±10% and Disable
Register cleared
Disables all programming instructions
Instruction
READ
EWEN
ERASE
WRITE
ERAL
SB
1
1
1
1
1
WRAL
EWDS
Note:
1
1
00
00
01XXXXXXX
00XXXXXXX
01XXXXXX
00XXXXXX
1. This device is not recommended for new designs. Please refer to AT93C56A.
2. This device is not recommended for new designs. Please refer to AT93C66A.
5
0172Y–SEEPR–11/04
