SAMD5x/E5x Family Data
Sheet
32-bit ARM® Cortex®-M4F MCUs with 1 Msps 12-bit ADC,
QSPI, USB, Ethernet, and PTC
Features
Operating Conditions:
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-40°C to +85°C, DC to 120 MHz
403 CoreMark
®
at 120 MHz
4 KB combined instruction cache and data cache
8-zones Memory Protection Unit (MPU)
Thumb
®
-2 instruction set
Embedded Trace Module (ETM) with instruction trace stream
Core Sight Embedded Trace Buffer (ETB)
Trace Port Interface Unit (TPIU)
Floating Point Unit (FPU)
Core: 120 MHz ARM
®
Cortex
®
-M4
Memories
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1 MB/512 KB/256 KB in-system self-programmable Flash with:
– Error Correction Code (ECC)
– Dual bank with Read-While-Write (RWW) support
– EEPROM hardware emulation
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256/192/128 KB SRAM Main Memory
– 128/96/64 KB of Error Correction Code (ECC) RAM option
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Up to 4 KB of Tightly Coupled Memory (TCM)
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Up to 8 KB additional SRAM
– Can be retained in backup mode
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Eight 32-bit backup registers
System
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Power-on Reset (POR) and Brown-out detection (BOD)
Internal and external clock options
External Interrupt Controller (EIC)
16 external interrupts
One non-maskable interrupt
Two-pin Serial Wire Debug (SWD) programming, test, and debugging interface
Power Supply
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Idle, Standby, Hibernate, Backup, and Off sleep modes
©
2018 Microchip Technology Inc.
Datasheet
DS60001507B-page 1
SAMD5x/E5x Family Data Sheet
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SleepWalking peripherals
Battery backup support
Embedded Buck/LDO regulator supporting on-the-fly selection
High-Performance Peripherals
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32-channel Direct Memory Access Controller (DMAC)
– Built-in CRC, with memory CRC generation/monitor hardware support
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Up to two SD(HC) Memory Card Interfaces (SDHC)
– Up to 50 MHz operation
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4-bit or 1-bit interface
Compatibility with SD and SDHC memory card specification version 3.01
Compatibility with SDIO specification version 3.0
– Compliant with JDEC specification, MMC memory cards V4.51
One Quad I/O Serial Peripheral Interface (QSPI)
– eXecute-In-Place (XIP) support
– Dedicated AHB memory zone
One Ethernet MAC (SAM E53 and SAM E54)
– 10/100 Mbps in MII and RMII with dedicated DMA
– IEEE 1588 Precision Time Protocol (PTP) support
– IEEE 1588 Time Stamping Unit (TSU) support
– IEEE802.3AZ energy efficiency support
– Support for 802.1AS and 1588 precision clock synchronization protocol
– Wake on LAN support
Up to two Controller Area Network CAN (SAM E51 and SAM E54)
– Support for CAN2.0 A/B and CAN-FD (ISO 11898-1:2015)
One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 interface
– Embedded host and device function
– Eight endpoints
– On-chip transceiver with integrated serial resistor
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System Peripherals
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32-channel Event System
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Up to eight Serial Communication Interfaces (SERCOM), each configurable to operate as either:
– USART with full-duplex and single-wire half-duplex configuration
– ISO7816
– I
2
C up to 3.4MHz
– SPI
– LIN master/slave
– RS485
– SPI inter-byte space
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Up to eight 16-bit Timers/Counters (TC) each configurable as:
– 16-bit TC with two compare/capture channels
– 8-bit TC with two compare/capture channels
– 32-bit TC with two compare/capture channels, by using two TCs
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Two 24-bit Timer/Counters for Control (TCC), with extended functions:
©
2018 Microchip Technology Inc.
Datasheet
DS60001507B-page 2
SAMD5x/E5x Family Data Sheet
Up to six compare channels with optional complementary output
Generation of synchronized pulse width modulation (PWM) pattern across port pins
Deterministic fault protection, fast decay and configurable dead-time between complementary
output
– Dithering that increase resolution with up to 5 bit and reduce quantization error
Up to Three 16-bit Timer/Counters for Control (TCC), with extended functions:
– Up to three compare channels with optional complementary output
32-bit Real Time Counter (RTC) with clock/calendar function
Up to 4 wake-up pins with tamper detection and debouncing filter
Watchdog Timer (WDT) with Window mode
CRC-32 generator
One two-channel Inter-IC Sound Interface (I2S)
Position Decoder (PDEC)
Frequency meter (FREQM)
One Configurable Custom Logic (CCL)
Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each
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Differential and single-ended input
Automatic offset and gain error compensation
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– Oversampling and decimation in hardware to support 13-, 14-, 15-, or 16-bit resolution
Dual 12-bit, 1 MSPS Output Digital-to-Analog Converter (DAC)
Two Analog Comparators (AC) with Window Compare function
One temperature sensor
Parallel Capture Controller (PCC)
– Up to 14-bit parallel capture mode
Peripheral Touch Controller (PTC)
– Capacitive Touch buttons, sliders, and wheels
– Wake-up on touch
– Up to 32 self-capacitance, and up to 256 mutual-capacitance channels
Cryptography
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One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate
– Five confidential modes of operation (ECB, CBC, CFB, OFB, CTR)
– Supports counter with CBC-MAC mode
– Galois Counter Mode (GCM)
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True Random Number Generator (TRNG)
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Public Key Cryptography Controller (PUKCC) and associated Classical Public Key Cryptography
Library (PUKCL)
– RSA, DSA
– Elliptic Curves Cryptography (ECC) ECC GF(2n), ECC GF(p)
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Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA
assisted
Oscillators
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32.768 kHz crystal oscillator (XOSC32K)
– Clock failure detection
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Up to two 8 MHz to 48 MHz crystal oscillator (XOSC)
©
2018 Microchip Technology Inc.
Datasheet
DS60001507B-page 3
SAMD5x/E5x Family Data Sheet
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I/O
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– Clock failure detection
32.768 kHz ultra low-power internal oscillator (OSCULP32K)
48 MHz Digital Frequency Locked Loop (DFLL48M)
Two 48-200 MHz Fractional Digital Phased Locked Loop (FDPLL200M)
Up to 99 programmable I/O pins
Packages
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48-pin QFN
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64-pin QFN, TQFP, WLCSP
100-pin TQFP
120-ball TFBGA
128-pin TQFP
©
2018 Microchip Technology Inc.
Datasheet
DS60001507B-page 4
Table of Contents
Features.......................................................................................................................... 1
1. Configuration Summary...........................................................................................17
2. Ordering Information................................................................................................19
3. Block Diagram......................................................................................................... 20
3.1.
SAM D5x/E5x Block Diagram.....................................................................................................20
4. Pinout...................................................................................................................... 22
4.1.
4.2.
4.3.
4.4.
4.5.
Pin Count 48 (G)........................................................................................................................ 22
Pin Count 64 (J)......................................................................................................................... 23
Pin Count 100 (N).......................................................................................................................25
Pin Count 120 (P).......................................................................................................................26
Pin Count 128 (P).......................................................................................................................27
5. Signal Descriptions List........................................................................................... 28
6. I/O Multiplexing and Considerations........................................................................32
6.1.
6.2.
Multiplexed Signals.................................................................................................................... 32
Other Functions..........................................................................................................................37
7. Power Supply and Start-Up Considerations............................................................ 47
7.1.
7.2.
7.3.
7.4.
Power Domain Overview............................................................................................................47
Power Supply Considerations.................................................................................................... 47
Power-Up................................................................................................................................... 49
Power-On Reset and Brown-Out Detector................................................................................. 50
8. Product Memory Mapping Overview....................................................................... 52
9. Memories.................................................................................................................54
9.1.
9.2.
9.3.
9.4.
9.5.
9.6.
Embedded Memories................................................................................................................. 54
Physical Memory Map................................................................................................................ 54
SRAM Memory Configuration.....................................................................................................55
NVM User Page Mapping...........................................................................................................57
NVM Software Calibration Area Mapping...................................................................................59
Serial Number............................................................................................................................ 60
10. Processor and Architecture..................................................................................... 61
10.1. Cortex M4 Processor..................................................................................................................61
10.2. Nested Vector Interrupt Controller..............................................................................................64
10.3. High-Speed Bus System............................................................................................................ 75
11. CMCC - Cortex M Cache Controller........................................................................ 79
11.1. Overview.................................................................................................................................... 79
©
2018 Microchip Technology Inc.
Datasheet
DS60001507B-page 5
