Signal Analysis
Probing TCK and RTCK
The output (TCK) and return (RTCK) test
clocks are easily accessible via the target
board’s JTAG header on pin 11 (TCK) and
pin 9 (RTCK). Attaching oscilloscope probes
to these pins will give you the ability to view
the clock synchronization with and without the
adapter in place.
Figure 6 below shows the output of the test
clock signals using an emulator that does not
handle the adaptive clocking feature of the TI
OMAP cores.
For this example, measurements were made
with the emulator connected to an OSK5912
as the target board. You can see that the
clocks are not synchronized, which can lead
to data corruption and reduced performance.
Figure 7 shows the output from the same
clock signals, using the same emulator con-
nected to the same OSK5912 target board.
The only difference is that we inserted the
JACK between the target board’s JTAG
header and the JTAG connector of the emula-
tor.
This shows that, without changing the emula-
tor, target board, or any settings, the clock
edges are fully synchronized. The TCK sig-
nal is
adapting
to the changes in RTCK from
the OMAP device’s core clock.
Figure 6—Non-adaptive clocking Emulator
QUICK
START
GUIDE
Overview
Blackhawk™
JTAG
Adaptive Clocking
Kit
for OMAP™
The
JTAG Adaptive Clocking Kit
(JACK), shown in
figure 1, is designed to allow JTAG emulators for TI
DSPs to synchronize with the adaptive clocking cores
of Texas Instruments OMAP™ devices providing com-
plete data integrity and increased performance.
What is Adaptive Clocking?
Figure 1 - JACK hardware
Part No. BH-EMU-JACK
Adaptive clocking is a feature of synthesizable cores,
introduced by ARM
®
Ltd. and adopted by TI in their
OMAP platform, wherein the input test clock (TCK) is delayed and synchronized with the core clock
before producing the output clock (RTCK). Emulators need to
adapt
to this changing RTCK signal.
During this delay (synchronizing period) the target core samples Test Data In (TDI), Test Mode
Select (TMS), and TCK with the core clock. This delay is variable and changes in real time, which
can cause data corruption.
Figure 2 shows an example of this
synchronizing mechanism inside the
OMAP processor core. Here you can
see the multi-stage synchronizer
consisting of several D-triggers,
which is dependant on the core clock
rate.
Figure 7—Adaptive Clocking Emulator
Solving the TRST Issue with the TI XDS510
XDS510-class emulators that depend on the TI SN74ACT8990 test bus controller (TBC) to assert
the TRST signal are susceptible to a dead-lock condition with certain OMAP cores that stop
RTCK when TRST is asserted. Because these cores stop RTCK, the TBC enters a suspended
state, never updates, and will not clear the asserted TRST signal.
To solve this issue, the adapter board will route TCK to RTCK if it detects RTCK has stopped
when TRST is asserted (see Figure 3). You will find that the TI XDS510 ISA card and other TBC-
based emulators will now work with all OMAP devices when this adapter kit is being used.
XDS560-class emulators, which do not rely on the TBC for asserting TRST, will not be affected by
the JACK’s TRST logic.
Blackhawk
123 Gaither Drive
Mt. Laurel, NJ 08054-1701
www.blackhawk-dsp.com
+1-877-983-4514
Blackhawk is a registered trademark of EWA Technologies, Inc.
BH-Jack-QS-01
Figure 3 illustrates the JACK logic to
handle these real time changes to
RTCK. The resulting logic will main-
tains synchronization with the JTAG
signals as the rate of the OMAP core
clock changes.
You may find
emulator
release notes
that describe setup changes
(workarounds) that are necessary to
operate with these TI OMAP adaptive
clocking cores. This usually involves
decreasing the output TCK rate of the
emulator. While this may seem to
correct the problem, the
data
and
clock signals will still
not
be
synchro-
nized
with the OMAP core clock and
you will only
decrease performance.
Figure 2—OMAP Adaptive Clocking Mechanism
Figure 3—JACK Adaptive Clocking Logic
Compatibility
This JACK is designed to be compatible with the traditional 14-pin emulators supporting the com-
mon JTAG functions and signals. This includes XDS510™-class and XDS560™-class emulators.
The JACK will also work when connected to non-adaptive clocking targets.
1
4
Installation
Orientation
The JACK is keyed (pin 6), but care should be taken when connecting it to a target board JTAG
header or emulator. Pin 1 of the JACK socket should align with pin 1 on the target board header.
Figure 4 shows the JACK connected to a target board’s JTAG header. The emulator can now be
connected to the JACK in the same manner it would normally be connected to the target board.
Maximizing Performance
Optimization
Using the JACK does not require any changes to your emulator or CCStudio setup. The adapter
will automatically synchronize the JTAG data and clocks for increased stability and data integrity.
However, to maximize performance, you should set your emulator to generate its maximum TCK
frequency, if applicable. Increasing your emulator’s TCK output rate will not affect data integrity.
Below is a description covering some of the popular TI JTAG emulators and how you can optimize
your configuration for maximum performance.
WARNING
If the JACK is installed incorrectly, damage can occur
to the target board, emulator, and adapter. The
adapter is keyed, and so should the emulator’s con-
nector and target board header.
Be sure to align connections correctly, with no power
applied to the emulator or target board.
The JACK is NOT hot-pluggable!
Figure 4—JACK connected to a
target board’s JTAG header
•
Fixed TCK Emulators
Emulators that have a fixed TCK rate are typically XDS510-class and generate a TCK fre-
quency between 10 or 12 MHz (please consult your emulator’s documentation for the correct
specifications on your emulator). These fixed TCK emulators, such as most XDS510 ISA, Par-
allel Port, and USB versions, do not require any changes to get the benefits from the JTAG
Adaptive Clocking Kit.
Just insert the JACK between the 14-pin JTAG connectors of the emulator and target board.
Then setup and start CCS as you would normally and the adapter board will automatically syn-
chronize the TCK, TCK_RET, and data signals.
•
Variable TCK Capable Emulators
Emulators that support variable TCK frequencies, such as the Blackhawk USB510 and PCI510
JTAG models, as well as all XDS560-class emulators, can also be used without changes.
However, these emulators typi-
cally support TCK rates well
above 10 MHz. So you can con-
figure them to generate their
highest TCK rate possible to yield
maximum performance.
TCK
frequencies are usually set with a
configuration parameter (i.e. in
CCSetup), but please refer to
your emulator’s documentation
on how to set a maximum TCK
rate. Figure 5 shows how to
change the setting for an
XDS560-class emulator from the
Connection Properties dialog in
CCStudio v3.1 setup.
If you are using an OMAP device
and have been instructed to slow
down the TCK rate of the emula-
tor you are using, this work-
around will no longer be neces-
sary. You can set it back to its
Figure 5—Setting the maximum TCK rate
original, maximum value. The
data will be synchronized and performance will be back to its original speed.
DISCLAIMERS
Read the following for important information to be aware of when using this hardware.
Optional Configurations
The JACK ships with an additional right-angle connector, pictured in options 1 and 2.
This connector is also keyed to match the standard TI 14-pin JTAG header. The right
angle connector is provided to allow two additional configurations where the straight,
vertical connection will not work.
Each right-angle option can be easily configured by attaching the right-angle connec-
tor to a different end of the JACK. Options 1 and 2, pictured here, show the different
orientations that are possible and highlights how the right angle connecter should be
attached the JACK.
If the right-angle connector is attached, the
resulting JACK will have a keyed socket to
attach to a target board, and keyed header
where the emulator can be attached.
Option 1
Option 2
Mechanical Considerations
The JACK hardware was designed using quality compo-
nents, fast LVC logic, and an FR4 base-laminate material
suitable of supporting most legacy board designs and
speeds.
The JACK has an impedance of approximately 50 ohms to
reduce the chance of mismatch with typical target boards.
Table 1 provides the signal to pin relationship. These sig-
nals follow the standard TI JTAG layout recommendations.
The header and socket on the JACK conform to the stan-
dard 0.100” spacing in a double row configuration.
Pin Name
1
3
5
7
9
11
13
TMS
TDI
TVD
TDO
RTCK
TCK
EMU0
Pin
2
4
6
8
10
12
14
Name
TRST
TDIS
KEY
GND
GND
GND
EMU1
•
•
•
Blackhawk is not responsible for any damage that may occur to the JACK, target board, or emulator if misused,
mishandled, or forced into place.
The JACK is not intended to be hot pluggable, damage may occur. Make sure you emulator and target board
are not powered when making connections.
The JACK is keyed (pin 6). Removing or modifying the JACK’s connectors is not recommended or supported
and can harm connected hardware.
2
Table 1 - 14-pin JTAG Header
Pin-out
3
ADI参考电路
