BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
128K x 16 or 256K x 8 bit switchable
DESCRIPTION
BS616LV2025
• Very low operation voltage : 4.5 ~ 5.5V
• Very low power consumption :
Vcc = 5.0V
C-grade: 40mA (Max.) operating current
I -grade: 45mA (Max.) operating current
0.6uA (Typ.) CMOS standby current
• High speed access time :
-70
70ns (Max.) at Vcc = 5.0V
-55
55ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin
The BS616LV2025 is a high performance, very low power CMOS Static
Random Access Memory organized as 131,072 words by 16 bits or
262,144 bytes by 8 bits selectable by CIO pin and operates from a wide
range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.6uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by active HIGH chip enable2
(CE2), active LOW chip enable1(CE1), active LOW output enable(OE)
and three-state output drivers.
The BS616LV2025 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV2025 is available in DICE form and 48-pin BGA type.
PRODUCT FAMILY
PRODUCT
FAMILY
BS616LV2025DC
BS616LV2025AC
BS616LV2025DI
BS616LV2025AI
OPERATING
TEMPERATURE
+0 C to +70 C
-40 C to +85 C
O
O
O
O
Vcc
RANGE
4.5V ~ 5.5V
4.5V ~ 5.5V
SPEED
( ns )
Vcc=5.0V
POWER DISSIPATION
STANDBY
Operating
( I
CCSB1
, Max )
( I
CC
, Max )
PKG TYPE
DICE
BGA-48-0608
DICE
BGA-48-0608
Vcc=5.0V
Vcc=5.0V
70 / 55
70 / 55
6uA
25uA
40mA
45mA
PIN CONFIGURATION
BLOCK DIAGRAM
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
2048
D0
16(8)
Data
Input
Buffer
16(8)
Column I/O
Address
Input
Buffer
20
Row
Decoder
1024
Memory Array
1024 x 2048
.
.
.
.
D15
CE1
CE2
WE
OE
UB
LB
CIO
Vdd
Vss
.
.
.
.
Write Driver
16(8)
Sense Amp
128(256)
Column Decoder
16(8)
Data
Output
Buffer
14(16)
Control
Address Input Buffer
A16 A0 A1 A2 A3 A4 A5
(SAE)
Brilliance Semiconductor, Inc
. reserves the right to modify document contents without notice.
R0201-BS616LV2025
1
Revision 2.5
Jan.
2004
BSI
PIN DESCRIPTIONS
BS616LV2025
Name
A0-A16 Address Input
SAE Address Input
CIO x8/x16 select input
Function
These 17 address inputs select one of the 131,072 x 16-bit words in the RAM.
This address input incorporates with the above 17 address input select one of the
262,144 x 8-bit bytes in the RAM if the CIO is LOW. Don't use when CIO is HIGH.
This input selects the organization of the SRAM. 131,072 x 16-bit words configuration
is selected if CIO is HIGH. 262,144 x 8-bit bytes configuration is selected if CIO is
LOW.
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active to read
from or write to the device. If either chip enable is not active, the device is deselected
and is in a standby power mode. The DQ pins will be in the high impedance state
when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
WE Write Enable Input
OE Output Enable Input
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
LB and UB Data Byte Control Input
D0 - D15 Data Input/Output Ports
Vcc
Gnd
Lower byte and upper byte data input/output control pins. The chip is deselected when
both LB and UB pins are HIGH.
These 16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
R0201-BS616LV2025
2
Revision 2.5
Jan.
2004
BSI
TRUTH TABLE
MODE
CE1
H
Fully Standby
X
Output Disable
L
L
H
H
H
X
CE2
X
X
X
X
X
X
L
Read from SRAM
( WORD mode )
L
H
L
H
H
H
L
L
Write to SRAM
( WORD mode )
L
H
X
L
H
H
L
Read from SRAM
L
( BYTE Mode )
Write to SRAM
L
( BYTE Mode )
H
X
L
L
X
X
A-1
H
L
H
L
X
X
A-1
L
L
X
X
X
H
L
L
H
X
X
OE
WE
CIO
LB
X
UB
X
X
SAE
BS616LV2025
D0~7
D8~15
VCC Current
High-Z
High-Z
I
CCSB
, I
CCSB1
High-Z
Dout
High-Z
Dout
Din
X
Din
Dout
High-Z
High-Z
Dout
Dout
X
Din
Din
High-Z
I
CC
I
CC
I
CC
I
CC
Din
X
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
SYMBOL
V
TERM
OPERATING RANGE
UNITS
V
O
PARAMETER
Terminal Voltage with
Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current
RATING
-0.5 to
Vcc+0.5
-40 to +125
-60 to +150
1.0
20
RANGE
Commercial
Industrial
AMBIENT
TEMPERATURE
0
O
C to +70
O
C
-40
O
C to +85
O
C
Vcc
4.5V ~ 5.5V
4.5V ~ 5.5V
T
BIAS
T
STG
P
T
I
OUT
C
C
O
W
mA
CAPACITANCE
(1)
(TA = 25
o
C, f = 1.0 MHz)
SYMBOL
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
C
IN
C
DQ
PARAMETER
Input
Capacitance
Input/Output
Capacitance
CONDITIONS
MAX.
UNIT
V
IN
=0V
V
I/O
=0V
6
8
pF
pF
1. This parameter is guaranteed and not 100% tested.
R0201-BS616LV2025
3
Revision 2.5
Jan.
2004
BSI
DC ELECTRICAL CHARACTERISTICS
(TA = 0
o
C to +70
o
C)
PARAMETER
NAME
V
IL
V
IH
I
IL
I
LO
V
OL
V
OH
I
CC
BS616LV2025
PARAMETER
Guaranteed Input Low
Voltage
(2)
Guaranteed Input High
Voltage
(2)
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating Power Supply
Current
Standby Current-TTL
TEST CONDITIONS
Vcc=5.0V
Vcc=5.0V
MIN. TYP.
(1)
MAX.
-0.5
2.2
--
--
--
2.4
--
--
--
--
--
--
--
--
0.8
Vcc+0.2
UNITS
V
V
uA
uA
V
V
mA
Vcc = Max, V
IN
= 0V to Vcc
Vcc = Max, CE1 = V
IH
or CE2=V
IL
or OE = V
IH
,
V
I/O
= 0V to Vcc
Vcc = Max, I
OL
= 2mA
Vcc = Min, I
OH
= -1mA
Vcc = Max, CE1= V
IL
, CE2=V
IH
I
DQ
= 0mA, F = Fmax
(3)
Vcc = Max, CE1 = V
IH
or CE2=V
IL
I
DQ
= 0mA
Vcc = Max, CE1
≧
Vcc-0.2V or
CE2
≦
0.2V,
Other inputs
≧
Vcc - 0.2V or
V
IN
≦
0.2V
Vcc=5.0V
Vcc=5.0V
Vcc=5.0V
1
1
0.4
--
40
I
CCSB
Vcc=5.0V
--
--
1
mA
I
CCSB1
Standby Current-CMOS
Vcc=5.0V
--
0.6
6
uA
1. Typical characteristics are at TA = 25
o
C.
2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
3. Fmax = 1/t
RC
.
R0201-BS616LV2025
4
Revision 2.5
Jan.
2004
BSI
DATA RETENTION CHARACTERISTICS
( TA = 0 to + 70
o
C )
SYMBOL
V
DR
BS616LV2025
TEST CONDITIONS
CE1
≧
Vcc - 0.2V or CE2
≦
0.2V,
V
IN
≧
Vcc - 0.2V or V
IN
≦
0.2V
CE1
≧
Vcc - 0.2V or CE2
≦
0.2V,
V
IN
≧
Vcc - 0.2V or V
IN
≦
0.2V
PARAMETER
Vcc for Data Retention
MIN.
1.5
TYP.
(1)
--
MAX.
--
UNITS
V
I
CCDR
Data Retention Current
Chip Deselect to Data
Retention Time
--
0.05
1.5
uA
t
CDR
t
R
0
See Retention Waveform
T
RC (2)
--
--
--
--
ns
ns
Operation Recovery Time
1. Vcc = 1.5V, T
A
= + 25
O
C
2. t
RC
= Read Cycle Time
LOW V
CC
DATA RETENTION WAVEFORM (1)
( CE1 Controlled )
Data Retention Mode
Vcc
V
IH
Vcc
V
DR
≧
1.5V
Vcc
t
CDR
CE1
≧
Vcc - 0.2V
t
R
V
IH
CE1
LOW V
CC
DATA RETENTION WAVEFORM (2)
( CE2 Controlled )
Data Retention Mode
Vcc
Vcc
V
DR
≧
1.5V
Vcc
t
CDR
t
R
CE2
≦
0.2V
CE2
V
IL
V
IL
R0201-BS616LV2025
5
Revision 2.5
Jan.
2004
