Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ106AX
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in a plastic full-pack envelope intended
for use in high frequency electronic lighting ballast applications, converters, inverters, switching regulators, motor
control systems, etc.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CBO
V
CEO
I
C
I
CM
P
tot
V
CEsat
h
FEsat
t
f
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
0.4
10
20
MAX.
700
700
400
10
20
26
1.0
15
50
UNIT
V
V
V
A
A
W
V
ns
T
hs
≤
25 ˚C
I
C
= 6.0 A;I
B
= 1.2 A
I
C
= 6.0 A; V
CE
= 5 V
I
C
= 5.0 A; I
B1
= 1A
PINNING - SOT186A
PIN
1
2
3
base
collector
emitter
DESCRIPTION
PIN CONFIGURATION
case
SYMBOL
c
b
1 2 3
case isolated
e
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
V
CBO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
400
700
10
20
5
10
26
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
T
hs
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
thj-hs
R
th j-a
PARAMETER
Junction to heatsink
Junction to ambient
CONDITIONS
With heatsink compound
in free air
TYP.
-
60
MAX.
4.8
-
UNIT
K/W
K/W
March 1999
1
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ106AX
ISOLATION LIMITING VALUE & CHARACTERISTIC
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
V
isol
PARAMETER
R.M.S. isolation voltage from all
three terminals to external
heatsink
CONDITIONS
f = 50-60 Hz; sinusoidal
waveform;
R.H.
≤
65% ; clean and dustfree
MIN.
-
TYP.
MAX.
2500
UNIT
V
C
isol
Capacitance from T2 to external f = 1 MHz
heatsink
-
10
-
pF
STATIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
,I
CBO
I
CES
I
CEO
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FEsat
PARAMETER
Collector cut-off current
1
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
CEO
= V
CEOMmax
(400V)
V
EB
= 9 V; I
C
= 0 A
I
B
= 0 A; I
C
= 10 mA;
L = 25 mH
I
C
= 6.0 A;I
B
= 1.2 A
I
C
= 6.0 A;I
B
= 1.2 A
I
C
= 5 mA; V
CE
= 5 V
I
C
= 500 mA; V
CE
= 5 V
I
C
= 6.0 A; V
CE
= 5 V
MIN.
-
-
-
-
400
-
-
10
14
8
TYP.
-
-
-
-
-
0.4
1.0
17
21
11
MAX.
0.2
0.5
0.1
1
-
1.0
1.5
32
33
15
UNIT
mA
mA
mA
mA
V
V
V
Collector cut-off current
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
DYNAMIC CHARACTERISTICS
T
hs
= 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
Switching times (resistive load)
t
on
t
s
t
f
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
t
s
t
f
Turn-off storage time
Turn-off fall time
CONDITIONS
I
Con
= 5 A; I
Bon
= -I
Boff
= 1 A;
R
L
= 75 ohms; V
BB2
= 4 V;
TYP.
MAX.
UNIT
µs
µs
ns
µs
ns
µs
ns
0.56
2.2
260
0.75
3.3
350
I
Con
= 5 A; I
Bon
= 1 A; L
B
= 1
µH;
-V
BB
= 5 V
I
Con
= 5 A; I
Bon
= 1 A; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
1.35
20
1.6
50
-
-
3.2
100
1
Measured with half sine-wave voltage (curve tracer).
March 1999
2
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ106AX
+ 50v
100-200R
IC
90 %
ICon
90 %
10 %
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
IB
ts
ton
toff
IBon
10 %
tr
30ns
-IBoff
tf
Fig.1. Test circuit for V
CEOsust
.
Fig.4. Switching times waveforms with resistive load.
IC / mA
VCC
250
LC
IBon
100
10
0
VCE / V
LB
T.U.T.
-VBB
min
VCEOsust
Fig.2. Oscilloscope display for V
CEOsust
.
Fig.5. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V; L
C
= 200 uH; L
B
= 1 uH
VCC
ICon
90 %
IC
RL
VIM
0
tp
IB
RB
T.U.T.
ts
toff
IBon
10 %
tf
t
T
-IBoff
t
Fig.3. Test circuit resistive load. V
IM
= -6 to +8 V
V
CC
= 250 V; t
p
= 20
µ
s;
δ
= t
p
/ T = 0.01.
R
B
and R
L
calculated from I
Con
and I
Bon
requirements.
Fig.6. Switching times waveforms with inductive load.
March 1999
3
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ106AX
120
110
100
90
80
70
60
50
40
30
20
10
0
%
Normalised Derating
with heatsink compound
VBEsat/V
1.4
1.2
1
0.8
P tot
0.6
0.4
0.2
0
20
40
60
80
Ths / C
100
120
140
0
0.1
1
IC/A
10
Fig.7. Normalised power dissipation.
PD% = 100
⋅
PD/PD
25˚C
= f (T
hs
)
HFE
50
Fig.10. Base-Emitter saturation voltage.
Solid lines = typ values, V
BEsat
= f(IC); at IC/IB =4.
VCEsat/V
0.3
30
0.25
VCE = 5V
20
15
0.2
VCE = 1V
10
0.15
5
0.1
0.05
2
0.01
0.05
0.1
0.3
IC/A
1
2
5
8
12
0
0.1
1
IC/A
10
Fig.8. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
VCEsat/V
2
Fig.11. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IC); at IC/IB =4.
Zth / (K/W)
BU1706AX
10
1.8
1.6
0.5
1
0.2
0.1
0.05
0.02
P
D
0.01
D=0
4A
3A
2A
1.4
1.2
1
0.1
0.8
tp
D=
t
p
T
t
0.6
0.4
T
10u 100u 1m 10m 100m
t/s
1
0.2
1A
0.001
10
0
0.01
1u
10
100
0.1
IB/A
1
Fig.9. Collector-Emitter saturation voltage.
Solid lines = typ values, V
CEsat
= f(IB); T
j
=25˚C.
Fig.12. Transient thermal impedance.
Z
th j-hs
= f(t); parameter D = t
p
/T
March 1999
4
Rev 2.000
Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ106AX
IC/A
14
VCC
12
10
LC
8
VCL(RBSOAR)
6
-5V
4
-3V
IBon
PROBE POINT
LB
T.U.T.
2
-1V
-VBB
0
0
100
200
300
400
500
VCEclamp/V
600
700
800
900
Fig.13. Reverse bias safe operating area (T
j
< T
jmax
)
for -V
be
= 5V,3V & 1V
Fig.14. Test circuit for reverse bias safe operating
area.
V
clamp
< 1000V; V
cc
= 150V; -V
be
= 5V,3V & 1V;
L
B
= 1
µ
H; L
C
= 200
µ
H
March 1999
5
Rev 2.000
