BUK724R5-30C
N-channel TrenchMOS standard level FET
Rev. 01 — 1 July 2010
Product data sheet
1. Product profile
1.1 General description
Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using advanced TrenchMOS technology. This product has been designed
and qualified to the appropriate AEC standard for use in high performance automotive
applications.
1.2 Features and benefits
AEC Q101 compliant
Avalanche robust
Suitable for standard level gate drive
Suitable for thermally demanding
environment up to 175°C rating
1.3 Applications
12V Motor, lamp and solenoid loads
High performance automotive power
systems
High performance Pulse Width
Modulation (PWM) applications
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
drain-source
on-state
resistance
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
V
GS
= 10 V; T
j
= 25 °C;
see
Figure 1
T
mb
= 25 °C; see
Figure 2
[1]
Min
-
-
-
Typ
-
-
-
Max Unit
30
75
157
V
A
W
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 12;
see
Figure 13
-
3.8
4.5
mΩ
Avalanche ruggedness
E
DS(AL)S
non-repetitive
I
D
= 75 A; V
sup
≤
30 V;
drain-source
R
GS
= 50
Ω;
V
GS
= 10 V;
avalanche energy T
j(init)
= 25 °C; unclamped
gate-drain charge V
GS
= 10 V; I
D
= 25 A;
V
DS
= 24 V; T
j
= 25 °C;
see
Figure 14
-
-
329
mJ
Dynamic characteristics
Q
GD
-
21
-
nC
NXP Semiconductors
BUK724R5-30C
N-channel TrenchMOS standard level FET
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
[1]
source
mounting base; connected to
drain
2
1
3
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
SOT428 (DPAK)
[1]
It is not possible to make connection to pin 2.
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK724R5-30C
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
Type number
BUK724R5-30C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 July 2010
2 of 14
NXP Semiconductors
BUK724R5-30C
N-channel TrenchMOS standard level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
V
GS
= 10 V; T
j
= 25 °C; see
Figure 1;
see
Figure 4
T
mb
= 100 °C; V
GS
= 10 V; see
Figure 1
V
GS
= 10 V; T
j
= 25 °C; see
Figure 1
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive
drain-source
avalanche energy
repetitive drain-source
avalanche energy
T
mb
= 25 °C
t
p
≤
10 µs; pulsed; T
mb
= 25 °C
I
D
= 75 A; V
sup
≤
30 V; R
GS
= 50
Ω;
V
GS
= 10 V; T
j(init)
= 25 °C; unclamped
see
Figure 3
[3][4][5]
[2]
[1]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
≥
25 °C; T
j
≤
175 °C
R
GS
= 20 kΩ
Min
-
-
-20
-
-
-
-
-
-55
-55
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
30
30
20
136
75
75
543
157
175
175
75
136
543
329
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
mJ
[2]
[2]
t
p
≤
10 µs; pulsed; T
j
= 25 °C;
see
Figure 4
T
mb
= 25 °C; see
Figure 2
Source-drain diode
Avalanche ruggedness
E
DS(AL)R
-
-
-
J
[1]
[2]
[3]
[4]
[5]
Current is limited by power dissipation chip rating.
Continuous current is limited by package.
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Repetitive avalanche rating limited by average junction temperature of 170 °C.
Refer to application note AN10273 for further information.
BUK724R5-30C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 July 2010
3 of 14
NXP Semiconductors
BUK724R5-30C
N-channel TrenchMOS standard level FET
140
I
D
(A)
120
100
003aac349
120
P
der
(%)
80
03na19
80
(1)
60
40
40
20
0
0
50
100
150
T
mb
(°C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Continuous drain current as a function of
mounting base temperature
10
3
I
AL
(A)
10
2
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
003aac351
(1)
10
(2)
1
(3)
10
-1
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig 3.
Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time
BUK724R5-30C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 July 2010
4 of 14
NXP Semiconductors
BUK724R5-30C
N-channel TrenchMOS standard level FET
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
10
μs
003aac350
100
μs
10
1 ms
DC
100 ms
1
10 ms
10
-1
10
-1
1
10
V
DS
(V)
10
2
Fig 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
Conditions
see
Figure 5
Min
-
Typ
0.65
Max
0.95
Unit
K/W
R
th(j-a)
-
70
-
K/W
1
Z
th(j-mb)
(K/W)
10
-1
δ
= 0.5
0.2
0.1
0.05
0.02
003aac067
10
-2
single shot
P
δ
=
t
p
T
t
p
T
t
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig 5.
BUK724R5-30C
Transient thermal impedance from junction to mounting base as a function of pulse duration
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 1 July 2010
5 of 14
