Important notice
Dear Customer,
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Nexperia.
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- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
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Should be replaced with:
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© Nexperia B.V. (year). All rights reserved.
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Kind regards,
Team Nexperia
BUK7880-55
16 March 2016
SO
T2
23
N-channel TrenchMOS standard level FET
Product data sheet
1. General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
2. Features and benefits
•
•
•
AEC Q101 compliant
Electrostatically robust due to integrated protection diodes
Low conduction losses due to low on-state resistance
3. Applications
•
Automotive and general purpose power switching
4. Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 150 °C
T
sp
= 25 °C
T
sp
= 25 °C;
Fig. 4
V
GS
= 10 V; I
D
= 5 A; T
j
= 25 °C
Min
-
-
-
Typ
-
-
-
Max
55
7.5
8.3
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
non-repetitive drain-
source avalanche
energy
-
65
80
mΩ
Avalanche ruggedness
E
DS(AL)S
I
D
= 2.5 A; V
sup
≤ 25 V; R
GS
= 50 Ω;
V
GS
= 10 V; T
j(init)
= 25 °C; unclamped
-
-
30
mJ
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NXP Semiconductors
BUK7880-55
N-channel TrenchMOS standard level FET
5. Pinning information
Table 2.
Pin
1
2
3
4
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
G
Simplified outline
4
Graphic symbol
D
1
2
3
S
SC-73 (SOT223)
sym116
6. Ordering information
Table 3.
Ordering information
Package
Name
BUK7880-55
BUK7880-55/CU
SC-73
SC-73
Description
plastic surface-mounted package with increased
heatsink; 4 leads
plastic surface-mounted package with increased
heatsink; 4 leads
Version
SOT223
SOT223
Type number
7. Marking
Table 4.
Marking codes
Marking code
xxYWW 78055
Type number
BUK7880-55
BUK7880-55/CU
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
P
tot
I
D
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
total power dissipation
drain current
T
sp
= 25 °C;
Fig. 4
T
sp
= 25 °C
T
sp
= 100 °C
BUK7880-55
All information provided in this document is subject to legal disclaimers.
Conditions
T
j
≥ 25 °C; T
j
≤ 150 °C
R
GS
= 20 kΩ
Min
-
-
-16
-
-
-
Max
55
55
16
8.3
7.5
4.7
Unit
V
V
V
W
A
A
© NXP Semiconductors N.V. 2016. All rights reserved
Product data sheet
16 March 2016
2 / 11
NXP Semiconductors
BUK7880-55
N-channel TrenchMOS standard level FET
Symbol
I
DM
T
stg
T
j
I
S
I
SM
E
DS(AL)S
Parameter
peak drain current
storage temperature
junction temperature
Conditions
T
sp
= 25 °C; pulsed
Min
-
-55
-55
Max
40
150
150
Unit
A
°C
°C
Source-drain diode
source current
peak source current
T
sp
= 25 °C
pulsed; T
sp
= 25 °C
I
D
= 2.5 A; V
sup
≤ 25 V; R
GS
= 50 Ω;
V
GS
= 10 V; T
j(init)
= 25 °C; unclamped
HBM; C = 100 pF; R = 1.5 kΩ
10
2
I
DM
(A)
10
-
-
7.5
40
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
-
30
mJ
Electrostatic discharge
V
esd
100
electrostatic discharge voltage
-
2
003aaf270
kV
003aaf269
I
D
(%)
80
60
40
20
0
R
DS(on)
= V
DS
/ I
D
t
p
= 1 µs
10 µs
100 µs
1 ms
10 ms
100 ms
1
D.C.
0
40
80
120
T
mb
(°C)
160
10
- 1
1
10
V
DS
(V)
10
2
Fig. 1.
Normalized continuous drain current as a
function of solder point temperature
T
sp
= 25 °C; I
DM
is single pulse
Fig. 2.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
BUK7880-55
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved
Product data sheet
16 March 2016
3 / 11
NXP Semiconductors
BUK7880-55
N-channel TrenchMOS standard level FET
100
WDSS
(%)
80
60
40
20
0
003aaf282
P
der
(%)
80
60
40
20
0
100
003aaf268
20
40
60
80
100
120
140
160
T
(mb)
(°C)
0
40
80
120
T
mb
(°C)
160
I
D
= 2.5 A
Fig. 3.
Normalised drain-source non-repetitive
avalanche energy as a function of mounting-
base temperature
Fig. 4.
Normalized total power dissipation as a
function of solder point temperature
9. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
Thermal characteristics
Parameter
thermal resistance
from junction to solder
point
thermal resistance
from junction to
ambient
10
2
Z
th(j-mb)
(K/W)
10 δ = 0.5
0.2
0.1
0.05
1
0.02
10
- 1
Conditions
mounted on any printed-circuit board
Min
-
Typ
12
Max
15
Unit
K/W
R
th(j-a)
Mounted on FR4 PCB, mounting pad
for drain 6.5 cm
2
-
120
-
K/W
003aaf271
P
δ=
t
p
T
0
t
p
10
- 4
10
- 3
10
- 2
t
T
1
10
t
p
(s)
10
- 2
10
- 6
10
- 5
10
- 1
Fig. 5.
Transient thermal impedance from junction to solder point as a function of pulse duration
BUK7880-55
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved
Product data sheet
16 March 2016
4 / 11