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BUK9E04-30B,127

N-channel TrenchMOS logic level FET TO-262 3-Pin

器件类别:分立半导体    晶体管   

厂商名称:Nexperia

厂商官网:https://www.nexperia.com

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器件参数
参数名称
属性值
Brand Name
Nexperia
厂商名称
Nexperia
零件包装代码
TO-262
包装说明
PLASTIC, TO-262, I2PAK-3
针数
3
制造商包装代码
SOT226
Reach Compliance Code
compliant
ECCN代码
EAR99
雪崩能效等级(Eas)
1300 mJ
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
30 V
最大漏极电流 (Abs) (ID)
75 A
最大漏极电流 (ID)
75 A
最大漏源导通电阻
0.0044 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-262AA
JESD-30 代码
R-PSIP-T3
JESD-609代码
e3
元件数量
1
端子数量
3
工作模式
ENHANCEMENT MODE
最高工作温度
175 °C
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
极性/信道类型
N-CHANNEL
最大功率耗散 (Abs)
254 W
最大脉冲漏极电流 (IDM)
732 A
认证状态
Not Qualified
表面贴装
NO
端子面层
Tin (Sn)
端子形式
THROUGH-HOLE
端子位置
SINGLE
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管应用
SWITCHING
晶体管元件材料
SILICON
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Important notice
Dear Customer,
On 7 February 2017 the former NXP Standard Product business became a new company with the
tradename
Nexperia.
Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS
semiconductors with its focus on the automotive, industrial, computing, consumer and wearable
application markets
In data sheets and application notes which still contain NXP or Philips Semiconductors references, use
the references to Nexperia, as shown below.
Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/,
use
http://www.nexperia.com
Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use
salesaddresses@nexperia.com
(email)
Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on
the version, as shown below:
- © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights
reserved
Should be replaced with:
-
© Nexperia B.V. (year). All rights reserved.
If you have any questions related to the data sheet, please contact our nearest sales office via e-mail
or telephone (details via
salesaddresses@nexperia.com).
Thank you for your cooperation and
understanding,
Kind regards,
Team Nexperia
I2P
AK
BUK9E04-30B
N-channel TrenchMOS logic level FET
Rev. 02 — 16 February 2011
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
AEC Q101 compliant
Low conduction losses due to low
on-state resistance
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V loads
Automotive systems
General purpose power switching
Motors, lamps and solenoids
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
Quick reference data
Parameter
drain-source
voltage
drain current
total power
dissipation
drain-source
on-state
resistance
Conditions
T
j
25 °C; T
j
175 °C
V
GS
= 5 V; T
mb
= 25 °C;
see
Figure 1;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
[1]
Min
-
-
-
Typ
-
-
-
Max Unit
30
75
254
V
A
W
Static characteristics
R
DSon
V
GS
= 10 V; I
D
= 25 A;
T
j
= 25 °C
V
GS
= 5 V; I
D
= 25 A;
T
j
= 25 °C; see
Figure 11;
see
Figure 12
-
-
2.7
3.4
3
4
mΩ
mΩ
NXP Semiconductors
BUK9E04-30B
N-channel TrenchMOS logic level FET
Quick reference data
…continued
Parameter
Conditions
Min
-
Typ
-
Max Unit
1.3
J
Table 1.
Symbol
E
DS(AL)S
Avalanche ruggedness
non-repetitive
I
D
= 75 A; V
sup
30 V;
drain-source
R
GS
= 50
Ω;
V
GS
= 5 V;
avalanche energy T
j(init)
= 25 °C; unclamped
gate-drain charge V
GS
= 5 V; I
D
= 25 A;
V
DS
= 24 V; T
j
= 25 °C;
see
Figure 13
Dynamic characteristics
Q
GD
-
22
-
nC
[1]
Continuous current is limited by package.
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
mb
D
Simplified outline
Graphic symbol
G
mbb076
S
1 2 3
SOT226 (I2PAK)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9E04-30B
I2PAK
Description
plastic single-ended package (I2PAK); TO-262
Version
SOT226
Type number
BUK9E04-30B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2011
2 of 13
NXP Semiconductors
BUK9E04-30B
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4.
Symbol
V
DS
V
DGR
V
GS
I
D
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T
mb
= 100 °C; V
GS
= 5 V; see
Figure 1
T
mb
= 25 °C; V
GS
= 5 V; see
Figure 1;
see
Figure 3
I
DM
P
tot
T
stg
T
j
I
S
I
SM
E
DS(AL)S
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
T
mb
= 25 °C
pulsed; t
p
10 µs; T
mb
= 25 °C
I
D
= 75 A; V
sup
30 V; R
GS
= 50
Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped
[1]
[2]
[1]
[2]
[1]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions
T
j
25 °C; T
j
175 °C
R
GS
= 20 kΩ
Min
-
-
-15
-
-
-
-
-
-55
-55
-
-
-
-
Max
30
30
15
75
183
75
732
254
175
175
75
183
732
1.3
Unit
V
V
V
A
A
A
A
W
°C
°C
A
A
A
J
T
mb
= 25 °C; pulsed; t
p
10 µs;
see
Figure 3
T
mb
= 25 °C; see
Figure 2
Source-drain diode
Avalanche ruggedness
[1]
[2]
Continuous current is limited by package.
Current is limited by power dissipation chip rating.
200
I
D
(A)
150
03no74
120
P
der
(%)
80
03na19
100
40
50
Capped at 75 A due to package
0
0
50
100
150
200
T
mb
(°C)
0
0
50
100
150
T
mb
(°C)
200
Fig 1.
Normalized continuous drain current as a
function of mounting base temperature
Fig 2.
Normalized total power dissipation as a
function of mounting base temperature
© NXP B.V. 2011. All rights reserved.
BUK9E04-30B
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 02 — 16 February 2011
3 of 13
NXP Semiconductors
BUK9E04-30B
N-channel TrenchMOS logic level FET
10
3
I
D
(A)
10
2
03no73
Limit R
DSon
= V
DS
/ I
D
t
p
= 10
μ
s
100
μ
s
1 ms
Capped at 75 A due to package
DC
10
10 ms
100 ms
1
1
10
10
2
V
DS
(V)
10
3
Fig 3.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
5. Thermal characteristics
Table 5.
Symbol
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Parameter
thermal resistance from
junction to mounting base
thermal resistance from
junction to ambient
Conditions
see
Figure 4
vertical in still air
Min
-
-
Typ
-
60
Max
0.59
-
Unit
K/W
K/W
1
Z
th(j-mb)
(K/W)
10
−1
03no75
δ
= 0.5
0.2
0.1
0.05
0.02
10
−2
P
δ
=
t
p
T
single shot
t
p
t
T
10
−3
10
−6
10
−5
10
−4
10
−3
10
−2
10
−1
t
p
(s)
1
Fig 4.
Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK9E04-30B
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 02 — 16 February 2011
4 of 13
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