C8051F93x-C8051F92x
Single/Dual Battery, 0.9–3.6 V, 64/32 kB, SmaRTClock, 10-Bit ADC MCU
Supply Voltage 0.9 to 3.6 V
-
One-Cell Mode supports 0.9 to 1.8 V operation
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Two-Cell Mode supports 1.8 to 3.6 V operation
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Built-in dc-dc converter with 1.8 to 3.3 V output for
use in one-cell mode
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Built-in LDO regulator allows a high analog supply
voltage and low digital core voltage
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2 built-in supply monitors (brownout detectors)
10-Bit Analog to Digital Converter
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±1 LSB INL; no missing codes
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Programmable throughput up to 300 ksps
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Up to 23 external inputs
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On-Chip Voltage Reference
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On-Chip PGA allows measuring voltages up to twice
the reference voltage
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16-bit Auto-Averaging Accumulator with Burst Mode
provides increased ADC resolution
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Data dependent windowed interrupt generator
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Built-in temperature sensor
High-Speed 8051 µC Core
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Pipelined instruction architecture; executes 70% of
-
-
Memory
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4352 bytes internal data RAM (256 + 4096)
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64 kB (‘F93x) or 32 kB (‘F92x) Flash; In-system pro-
grammable in 1024-byte sectors—1024 bytes are
reserved in the 64 kB devices
instructions in 1 or 2 system clocks
Up to
25 MIPS
throughput with 25 MHz clock
Expanded interrupt handler
Digital Peripherals
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24 or 16 port I/O; All 5 V tolerant with high sink
-
-
-
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current and programmable drive strength-
Hardware SMBus™ (I
2
C™ Compatible), 2 x SPI™,
and UART serial ports available concurrently
Four general purpose 16-bit counter/timers
Programmable 16-bit counter/timer array with six
capture/compare modules and watchdog timer
Hardware SmaRTClock operates down to 0.9 V and
requires less than 0.5 µA supply current
Two Comparators
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Programmable hysteresis and response time
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Configurable as wake-up or reset source
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Up to 23 Capacitive Touch Sense Inputs
6-Bit Programmable Current Reference
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Up to ±500 µA. Can be used as a bias or for
generating a custom reference voltage
Clock Sources
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Internal oscillators: 24.5 MHz, 2% accuracy
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-
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supports UART operation; 20 MHz low power
oscillator requires very little bias current
External oscillator: Crystal, RC, C, or CMOS Clock
SmaRTClock oscillator: 32 kHz Crystal or internal
self-oscillate mode
Can switch between clock sources on-the-fly; useful
in implementing various power saving modes
On-Chip Debug
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On-chip debug circuitry facilitates full-speed, non-
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-
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intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping
Inspect/modify memory and registers
Complete development kit
Packages
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32-pin QFN (5 x 5 mm)
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24-pin QFN (4 x 4 mm)
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32-pin LQFP (7 x 7 mm, easy to hand-solder)
Temperature Range: –40 to +85 °C
CROSSBAR
EMIF
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
2 x SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
CRC
Port 0
Port 1
10-bit
300 ksps
ADC
+
IREF
+
–
TEMP
SENSOR
VREF
VREG
–
Port 2
VOLTAGE
COMPARATORS
24.5 MHz PRECISION
INTERNAL OSCILLATOR
External Oscillator
20 MHz LOW POWER
INTERNAL OSCILLATOR
HARDWARE SmaRTClock
HIGH-SPEED CONTROLLER CORE
64/32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
4352 B
SRAM
POR
WDT
Rev. 1.4 11/13
Copyright © 2013 by Silicon Laboratories
C8051F93x-C8051F92x
C8051F93x-C8051F92x
2
Rev. 1.4
C8051F93x-C8051F92x
Table of Contents
1. System Overview.................................................................................................... 17
1.1. CIP-51™ Microcontroller Core.......................................................................... 20
1.1.1. Fully 8051 Compatible.............................................................................. 20
1.1.2. Improved Throughput ............................................................................... 20
1.1.3. Additional Features .................................................................................. 20
1.2. Port Input/Output............................................................................................... 21
1.3. Serial Ports ....................................................................................................... 22
1.4. Programmable Counter Array ........................................................................... 22
1.5. 10-Bit SAR ADC with 16-bit Auto-Averaging Accumulator and Autonomous Low
Power Burst Mode............................................................................................... 23
1.6. Programmable Current Reference (IREF0) ...................................................... 24
1.7. Comparators ..................................................................................................... 24
2. Ordering Information.............................................................................................. 26
3. Pinout and Package Definitions............................................................................ 27
4. Electrical Characteristics....................................................................................... 45
4.1. Absolute Maximum Specifications .................................................................... 45
4.2. Electrical Characteristics................................................................................... 46
5. 10-Bit SAR ADC with 16-bit Auto-Averaging Accumulator and Autonomous Low
Power Burst Mode ....................................................................................................... 67
5.1. Output Code Formatting ................................................................................... 68
5.2. Modes of Operation .......................................................................................... 69
5.2.1. Starting a Conversion............................................................................... 69
5.2.2. Tracking Modes........................................................................................ 70
5.2.3. Burst Mode ............................................................................................... 71
5.2.4. Settling Time Requirements ..................................................................... 73
5.2.5. Gain Setting.............................................................................................. 74
5.3. 8-Bit Mode......................................................................................................... 74
5.4. Programmable Window Detector ...................................................................... 81
5.4.1. Window Detector In Single-Ended Mode ................................................. 83
5.4.2. ADC0 Specifications................................................................................. 83
5.5. ADC0 Analog Multiplexer.................................................................................. 84
5.6. Temperature Sensor ......................................................................................... 86
5.6.1. Calibration ................................................................................................ 87
5.7. Voltage and Ground Reference Options........................................................... 89
5.8. External Voltage References ............................................................................ 90
5.9. Internal Voltage References ............................................................................. 90
5.10.Analog Ground Reference................................................................................ 90
5.11.Temperature Sensor Enable ............................................................................ 90
5.12.Voltage Reference Electrical Specifications ..................................................... 91
6. Programmable Current Reference (IREF0) .......................................................... 92
6.1. IREF0 Specifications......................................................................................... 92
7. Comparators ........................................................................................................... 93
7.1. Comparator Inputs ............................................................................................ 93
Rev. 1.4
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C8051F93x-C8051F92x
7.2. Comparator Outputs ......................................................................................... 94
7.3. Comparator Response Time............................................................................. 95
7.4. Comparator Hysterisis ...................................................................................... 95
7.5. Comparator Register Descriptions.................................................................... 96
7.6. Comparator0 and Comparator1 Analog Multiplexers...................................... 100
8. CIP-51 Microcontroller ......................................................................................... 103
8.1. Instruction Set ................................................................................................. 104
8.1.1. Instruction and CPU Timing ................................................................... 104
8.2. CIP-51 Register Descriptions.......................................................................... 109
9. Memory Organization........................................................................................... 112
9.1. Program Memory ............................................................................................ 113
9.1.1. MOVX Instruction and Program Memory ............................................... 113
9.2. Data Memory .................................................................................................. 114
9.2.1. Internal RAM .......................................................................................... 114
9.2.2. External RAM ......................................................................................... 115
10. External Data Memory Interface and On-Chip XRAM........................................ 116
10.1.Accessing XRAM............................................................................................ 116
10.1.1.16-Bit MOVX Example ........................................................................... 116
10.1.2.8-Bit MOVX Example ............................................................................. 116
10.2.Configuring the External Memory Interface for Off-Chip Access.................... 117
10.3.External Memory Interface Port Input/Output Configuration........................... 117
10.4.Multiplexed External Memory Interface .......................................................... 118
10.5.External Memory Interface Operating Modes................................................. 120
10.5.1.Internal XRAM Only ............................................................................... 120
10.5.2.Split Mode without Bank Select.............................................................. 120
10.5.3.Split Mode with Bank Select................................................................... 121
10.5.4.External Only.......................................................................................... 121
10.6.External Memory Interface Timing.................................................................. 121
10.7.EMIF Special Function Registers ................................................................... 122
10.8.EMIF Timing Diagrams................................................................................... 125
10.8.1.Multiplexed 16-bit MOVX: EMI0CF[3:2] = 01, 10, or 11......................... 125
10.8.2.Multiplexed 8-bit MOVX without Bank Select: EMI0CF[3:2] = 01 or 11. 126
11. Special Function Registers ................................................................................. 129
11.1.SFR Paging .................................................................................................... 130
12. Interrupt Handler .................................................................................................. 136
12.1.Enabling Interrupt Sources ............................................................................. 136
12.2.MCU Interrupt Sources and Vectors............................................................... 136
12.3.Interrupt Priorities ........................................................................................... 137
12.4.Interrupt Latency............................................................................................. 137
12.5.Interrupt Register Descriptions ....................................................................... 139
12.6.External Interrupts INT0 and INT1.................................................................. 146
13. Flash Memory ....................................................................................................... 148
13.1.Programming The Flash Memory ................................................................... 148
13.1.1.Flash Lock and Key Functions ............................................................... 148
13.1.2.Flash Erase Procedure .......................................................................... 149
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C8051F93x-C8051F92x
13.1.3.Flash Write Procedure ........................................................................... 149
13.2.Non-volatile Data Storage .............................................................................. 150
13.3.Security Options ............................................................................................. 150
13.4.Determining the Device Part Number at Run Time ........................................ 152
13.5.Flash Write and Erase Guidelines .................................................................. 153
13.5.1.VDD Maintenance and the VDD Monitor ............................................... 153
13.5.2.PSWE Maintenance ............................................................................... 154
13.5.3.System Clock ......................................................................................... 154
13.6.Minimizing Flash Read Current ...................................................................... 155
14. Power Management.............................................................................................. 159
14.1.Normal Mode .................................................................................................. 160
14.2.Idle Mode........................................................................................................ 161
14.3.Stop Mode ...................................................................................................... 161
14.4.Suspend Mode ............................................................................................... 162
14.5.Sleep Mode .................................................................................................... 162
14.6.Configuring Wakeup Sources......................................................................... 163
14.7.Determining the Event that Caused the Last Wakeup.................................... 164
14.8.Power Management Specifications ................................................................ 166
15. Cyclic Redundancy Check Unit (CRC0) ............................................................. 167
15.1.16-bit CRC Algorithm...................................................................................... 167
15.2.32-bit CRC Algorithm...................................................................................... 169
15.3.Preparing for a CRC Calculation .................................................................... 170
15.4.Performing a CRC Calculation ....................................................................... 170
15.5.Accessing the CRC0 Result ........................................................................... 170
15.6.CRC0 Bit Reverse Feature............................................................................. 174
16. On-Chip DC-DC Converter (DC0) ........................................................................ 175
16.1.Startup Behavior............................................................................................. 176
16.2.High
Power Applications ............................................................................. 177
16.3.Pulse Skipping Mode...................................................................................... 177
16.4.Enabling the DC-DC Converter ...................................................................... 178
16.5.Minimizing Power Supply Noise ..................................................................... 179
16.6.Selecting the Optimum Switch Size................................................................ 179
16.7.DC-DC Converter Clocking Options ............................................................... 179
16.8.DC-DC Converter Behavior in Sleep Mode .................................................... 180
16.9.DC-DC Converter Register Descriptions ........................................................ 181
16.10.DC-DC Converter Specifications .................................................................. 182
17. Voltage Regulator (VREG0) ................................................................................. 183
17.1.Voltage Regulator Electrical Specifications .................................................... 183
18. Reset Sources....................................................................................................... 184
18.1.Power-On (VBAT Supply Monitor) Reset ....................................................... 185
18.2.Power-Fail (VDD/DC+ Supply Monitor) Reset................................................ 186
18.3.External Reset ................................................................................................ 188
18.4.Missing Clock Detector Reset ........................................................................ 188
18.5.Comparator0 Reset ........................................................................................ 188
18.6.PCA Watchdog Timer Reset .......................................................................... 188
Rev. 1.4
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