Networks That Think
TM
...
Multi-Core MIPS64 Processors
R
OCTEON Plus CN52XX 2 to 4-Core MIPS64-Based SoCs
TM
Product Brief
OVERVIEW
T
he OCTEON™ Plus CN52XX family of Multi-core MIPS64 processors targets intelligent networking, control plane, security, and
wireless applications in next-generation equipment from 500Mbps to 4Gbps performance. The family includes four di erent
software-compatible parts, with two to four cnMIPS64 cores on a single chip that integrate next-generation SERDES based
networking I/Os along with the most advanced security and application hardware acceleration to deliver a robust performance,
power and real-estate value proposition over alternative solutions.
FEATURES
Software compatible with the leading OCTEON family
•
2 - 4 cnMIPS CPU cores (MIPS64/32 compatible)
•
Available in 500 MHz to 900 MHz versions
•
Enhanced MIPS64 integer (Release 2) instruction set
•
Dual-issue, ve-stage pipeline, optimized latencies
•
Auto instruction pre-fetching and advanced data
pre-fetching features to minimize memory stalls
High-performance coherent memory subsystem
•
512KB ECC protected L2 cache with locking,
partitioning features for optimal performance
•
Integrated mainstream DDR2 memory controller
with ECC, up to DDR2-800, 72-bit wide
Integrated coprocessors for application acceleration
•
Packet I/O processing, QoS, TCP acceleration
•
Support for IPsec, SSL, SRTP, WLAN and 3G/UMB/LTE
security (includes DES, 3DES, AES-GCM, AES up to 256,
SHA1, SHA-2 up to SHA-512, RSA up to 8192, DH, KASUMI)
•
RAID, De-duplication
High-density, high-bandwidth serial I/O for networking
•
8 high-speed SERDES allowing exiible combination of
PCI Express, XAUI (10GE), SGMII (GbE)
Comprehensive development environment with Linux,
VxWorks, FreeBSD, NetBSD, and C/C++ support
Max power consumption: 7W – 13W
•
Package: 35 x35 mm 729 HSBGA
BENEFITS
Market-leading performance
•
Up to 7.2 Billion instructions per second
•
Over 4 Gbps application performance
- Up to 8 Mpps 64B IP forwarding
- Up to 10+ Gbps for TCP, IPsec, SSL, KASUMI
Sophisticated hardware based QoS support
•
Queuing, scheduling
•
Very low latency for real-time tra c
Scalable per-core security coprocessor architecture for lower
latency, reduced interconnect overhead, and higher small
packet performance
Reduced BOM cost with essential interfaces
Standalone Routers/Appliances, O oad Module, ATCA,
AMC, MicroTCA and NIC Applications
Flexible architecture allows host and coprocessor
Implementations in a single chip
Industry-standard programming model without any need for
proprietary tools or micro-coding
Fully software compatible with entire OCTEON family
to deliver 1- 16 CPU scalability
Highest performance, optimized power and integration
for Networking and Wireless control plane, L4-L7 data
and security services
OCTEON Plus CN52XX
- Block Diagram
805 East Middle eld Road
Mountain View, CA 94043
T
650.623.7000
F
650.625.9751
E
sales@caviumnetworks.com
www.caviumnetworks.com
Networks That Think
TM
...
Multi-Core MIPS64 Processors
R
OCTEON Plus CN52XX 2 to 4-Core MIPS64-Based SoCs
TM
Product Brief
OCTEON Plus CN52XX - Based System Block Diagram
Secure Router
DDR2
DRAM
3G/4G/WiMAX Base Station
DDR2
DRAM
Memory
4 SGMII
or XAUI
64-72
bits
SGMII
Boot Bus
PCIe
x1, x2
SGMII
SGMII
GbE
Phys
OCTEON Plus
CN52XX
SATA
Controller
PCIe
x1, x2
HDDD DR2 DRAM
SGMII
MII
OCTEON Plus
CN52XX
USB 2.0
3x UART, TWSL
& SPI
PCI Express USB 2.0
Powerful CPU, Security, Network Processing included.
APPLICATIONS
•
Wireless WAN security, control and packet processing
including 3G/UMB, LTE, and WiMAX
•
Next-generation integrated, standalone routers and
appliances
•
Uni ed Threat Management (UTM) appliances with
Firewall, VPN (IPsec, SSL), IDS, IPS and Anti-virus
scanning
•
Network and Server acceleration cards for security, TCP,
content processing, and compression
•
Integrated management and router processor cards
•
Switch/router line card and services card control
and datapath processing
•
Wireless LAN switch/appliance security and packet
processing
•
Application aware/L4+ content processing and switching
SOFTWARE SUPPORT
•
Cavium Networks SDK includes:
-
Up to 4-way SMP LINUX support
-
Cavium Simple Executive for data plane applications
-
Complete GNU tool-chain, GDB, DDD and Viewzilla
for tuning
-
Optimized C libraries for security, de/compression
processing o oad
-
Support for run-to-completion or pipelined software
models
•
Complete production quality development toolkits for IP,
IPsec, SSL, TCP, SSL-VPN, SRTP available
•
Comprehensive ecosystem support
-
Popular third-party operating systems and toolchains,
including MontaVista Linux, Wind River VxWorks, and
Linux, ENEA OSE, and NetBSD
-
Broad range of third-party application software vendors
-
Broad choices of ODM appliances, AMC, and ATCA cards
•
MIPS64/32 support enables thousands of MIPS and other
C/C++ applications to be easily ported to OCTEON
OCTEON Plus CN52XX - Product Family
Performance
Device
cnMIPS
cores
Max. Available
Instructions
Per Second
3.6B
7.2B
S
C
P
Option
L2 Cache
Networking
Interfaces
PCIe v1
Main Memory IO
w/ECC
Package
C
P
CN5220
CN5230
2
4
Y
Y
512KB
2 MII, 4x SGMII
or 1x XAUI
1x 4 Lanes or
or 2 x 2 Lanes
DDR2 up to 800 MHz
1x 72-bits wide
729 HSBGA
805 East Middle eld Road
Mountain View, CA 94043
T
650.623.7000
F
650.625.9751
E
sales@caviumnetworks.com
www.caviumnetworks.com
Device Options:
Device Speed Grade (500 = 500 MHz, 600 = 600 MHz, 700 = 700 MHz, 800 = 800 MHz, 900 = 900 MHz))
Option code for device family listed below:
SCP = Secure Communications Processor: Includes encryption, networking, TCP acceleration, QoS, RAID, De-dup acceleration
CP = Communications Processor: Includes networking, TCP acceleration and QoS
2008 Cavium Networks. All Rights reserved. NITROX and OCTEON are trademarks of Cavium Networks. All other brands and product names are trademarks of their respective owners.
CN52XX-PB-1.0 Printed in the USA
NXP MCU
