DBL101G - DBL107G
Taiwan Semiconductor
CREAT BY ART
1A, 50V - 1000V Glass Passivated Bridge Rectifiers
FEATURES
- Ideal for printed circuit board
- Reliable low cost construction utilizing molded plastic technique
- High surge current capability
- UL Recognized File # E-326854
- Compliant to RoHS Directive 2011/65/EU and
in accordance to WEEE 2002/96/EC
- Halogen-free according to IEC 61249-2-21
DBL
MECHANICAL DATA
Case:
Molded plastic body
Molding compound, UL flammability classification rating 94V-0
Part no. with suffix "H" means AEC-Q101 qualified
Packing code with suffix "G" means green compound (halogen-free)
Terminal:
Matte tin plated leads, solderable per JESD22-B102
Meet JESD 201 class 2 whisker test
Polarity:
Polarity as marked on the body
Weight:
0.36 g (approximately)
MAXIMUM RATINGS AND ELECTRICAL CHARACTERISTICS
(T
A
=25°C unless otherwise noted)
PARAMETER
Maximum repetitive peak reverse voltage
Maximum RMS voltage
Maximum DC blocking voltage
Maximum average forward rectified current
Peak forward surge current, 8.3 ms single half sine-wave
superimposed on rated load
Rating for fusing (t<8.3ms)
Maximum instantaneous forward voltage (Note 1)
I
F
= 1 A
Maximum reverse current @ rated V
R
T
J
=25°C
T
J
=125°C
SYMBOL
V
RRM
V
RMS
V
DC
I
F(AV)
I
FSM
I
2
t
V
F
I
R
C
J
R
θJL
R
θJA
T
J
T
STG
40
6.64
1.1
2
500
25
15
40
- 55 to +150
- 55 to +150
DBL
101G
50
35
50
DBL
102G
100
70
100
DBL
103G
200
140
200
DBL
104G
400
280
400
1
30
3.73
DBL
105G
600
420
600
DBL
106G
800
560
800
DBL
107G
1000
700
1000
UNIT
V
V
V
A
A
A
2
s
V
μA
pF
°C/W
°C
°C
Typical junction capacitance Per Leg (Note 2)
Typical thermal resistance
Operating junction temperature range
Storage temperature range
Note 1: Pulse Test with PW=300μs,1% Duty Cycle
Note 2: Measure at 1.0MHz and Applied Reverse Voltage of 4.0 Volts D.C.
Document Number: DS_D1310043
Version: Q15
DBL101G - DBL107G
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
DBL10xG
(Note 1)
*: Optional available
PACKING CODE
H
PACKING
CODE
C1
PACKING CODE
SUFFIX
G
(*)
PACKAGE
DBL
PACKING
50 / TUBE
Note 1: "x" defines voltage from 50V (DBL101G) to 1000V (DBL107G)
EXAMPLE
PREFERRED P/N
DBL107GHC1G
PART NO.
DBL107G
PART NO.
SUFFIX
H
PACKING CODE
C1
PACKING CODE
SUFFIX
G
DESCRIPTION
AEC-Q101 qualified
Green compound
RATINGS AND CHARACTERISTICS CURVES
(T
A
=25°C unless otherwise noted)
FIG.1 FORWARD CURRENT DERATING CURVE
1.5
100
INSTANTANEOUS REVERSE CURRENT (μA)
FIG. 2 TYPICAL REVERSE CHARACTERISTICS
AVERAGE FORWARD CURRENT (A)
10
1
T
J
=125°C
1
0.5
RESISTIVE OR
INDUCTIVE LOAD
WITH HEATSINK
0
0
20
40
60
80
100
120
140
160
0.1
T
J
=25°C
0.01
0
20
40
60
80
100
120
140
PERCENT OF RATED PEAK REVERSE VOLTAGE (%)
AMBIENT TEMPERATURE (
°
C)
FIG. 3 MAXIMUM NON-REPETITIVE FORWARD
SURGE CURRENT
INSTANTANEOUS FORWARD CURRENT (A)
PEAK FORWARD SURGE CURRENT (A)
40
8.3ms Single Half Sine Wave
30
DBL101G - 105G
20
DBL106G - 107G
10
FIG. 4 TYPICAL FORWARD CHARACTERISTICS
10
1
0
1
10
NUMBER OF CYCLES AT 60 Hz
100
0.1
0.4
0.6
0.8
1
1.2
1.4
1.6
FORWARD VOLTAGE (V)
Document Number: DS_D1310043
Version: Q15
DBL101G - DBL107G
Taiwan Semiconductor
FIG. 5 TYPICAL JUNCTION CAPACITANCE
100
CAPACITANCE (pF)
A
10
f=1.0MHz
Vsig=50mVp-p
1
1
10
REVERSE VOLTAGE (V)
100
PACKAGE OUTLINE DIMENSIONS
DBL
DIM.
A
B
C
D
E
F
G
H
I
J
K
L
Unit (mm)
Min
6.20
7.24
8.12
2.40
0.89
0.46
5.00
1.39
1.27
3.81
0.22
7.60
Max
6.50
8.00
8.51
2.60
1.14
0.58
5.20
1.90
2.03
4.69
0.33
8.90
Unit (inch)
Min
0.244
0.285
0.320
0.094
0.035
0.018
0.197
0.055
0.050
0.150
0.009
0.299
Max
0.256
0.315
0.335
0.102
0.045
0.023
0.205
0.075
0.080
0.185
0.013
0.350
MARKING DIAGRAM
P/N
G
YW
F
= Specific Device Code
= Green Compound
= Date Code
= Factory Code
Document Number: DS_D1310043
Version: Q15
DBL101G - DBL107G
Taiwan Semiconductor
CREAT BY ART
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to
any intellectual property rights is granted by this document. Except as provided in TSC's terms and conditions of
sale for such products, TSC assumes no liability whatsoever, and disclaims any express or implied warranty,
relating to sale and/or use of TSC products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify TSC for any damages resulting from such improper use or sale.
Document Number: DS_D1310043
Version: Q15
FPGA/CPLD
