Features ................................................................................................................................................................ 3
Active Region Selection ........................................................................................................................................ 5
Video Input/Output ....................................................................................................................................... 6
Parameter Update Port ................................................................................................................................ 6
User Parameters Tab............................................................................................................................................ 8
Video Frame................................................................................................................................................. 8
Data Widths.................................................................................................................................................. 9
Chapter 4. IP Core Generation............................................................................................................. 10
Licensing the IP Core.......................................................................................................................................... 10
Getting Started .................................................................................................................................................... 10
IPexpress-Created Files and Top Level Directory Structure............................................................................... 12
Instantiating the Core .......................................................................................................................................... 13
Enabling Hardware Evaluation in Diamond................................................................................................ 15
Enabling Hardware Evaluation in ispLEVER.............................................................................................. 15
Updating/Regenerating the IP Core .................................................................................................................... 15
Regenerating an IP Core in Diamond ........................................................................................................ 15
Regenerating an IP Core in ispLEVER ...................................................................................................... 16
Chapter 5. Support Resources ............................................................................................................ 17
Telephone Support Hotline ........................................................................................................................ 17
E-mail Support ........................................................................................................................................... 17
Local Support ............................................................................................................................................. 17
Internet ....................................................................................................................................................... 17
Revision History .................................................................................................................................................. 17
Appendix A. Resource Utilization ....................................................................................................... 18
Ordering Part Number................................................................................................................................ 18
Ordering Part Number................................................................................................................................ 18
Ordering Part Number................................................................................................................................ 19
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
IPUG86_01.0, February 2011
2
2D Edge Detector IP Core User’s Guide
Chapter 1:
Introduction
The 2D Edge Detector IP core detects edges in incoming video frames using the Sobel or Prewitt algorithms. Its
flexible architecture supports a wide variety of video frame sizes on LatticeECP2M™, LatticeXP2™, and
LatticeECP3™ devices. A simple I/O handshake makes the core suitable for either streaming or bursty input video
data. Coefficients may be set at compile time, or updated in-system via a simple memory interface. Dynamic zoom
and pan functions are optionally provisioned at compile time.
Quick Facts
Table 1-1
gives quick facts about the 2D Edge Detector IP core.
Table 1-1. Quick Facts
2D Edge Detector IP Core
320x240
Core
Requirements
FPGA Fa miles Supported
Minimum Device Required
LUTs/Registers
LatticeXP2
EBRs
sysDSP™ blocks
LUTs/Registers
Resource
Utilization
LatticeECP2M
EBRs
sysDSP blocks
LUTs/Registers
LatticeECP3
EBRs
sysDSP blocks
Lattice Implementation
Design Tool
Support
Synthesis
Simulation
1. Uses sysDSP blocks for adder functions.
640x480
1
720x480
1280x720
LatticeXP2, LatticeECP2M, LatticeECP3
456/393
1
0
456/393
1
0
437/391
1
0
277/119
1
5
277/119
1
5
274/119
1
10
465/399
1
0
465/399
1
0
462/398
1
0
475/399
2
0
475/399
2
0
460/402
2
0
Lattice Diamond™ 1.1 or ispLEVER
®
8.1SP1
Synopsys
®
Synplify™ Pro for Lattice D-2010.03L-SP1
Aldec
®
Active-HDL™ 8.2 Lattice Edition II
Mentor Graphics
®
ModelSim™ SE 6.3F
Features
• Single color plane input
• Configurable input data width
• Dynamically variable input frame size
• Dynamic active region selection
• Dynamic selection between Sobel and Prewitt algorithms
• Dynamic detection threshold modification
IPUG86_01.0, February 2011
3
2D Edge Detector IP Core User’s Guide
Chapter 2:
Functional Description
Key Concepts
Video edge detection is the process of calculating gradients (rates of change) in pixel values in an incoming frame.
If the gradient at a given pixel location exceeds a threshold value, the edge detector outputs a ‘1’, ‘0’ otherwise. For
the Sobel and Prewitt algorithms, gradients are calculated using convolution filters with 3x3 windows with fixed
coefficient values. The coefficient values are 0, 1, -1, and 2, so multiplication operations are performed using sim-
ple shifts and inversions.
The 2D Edge Detector IP core simultaneously applies two orthogonal 3x3 gradient filters to its input pixel stream
and sums the results. The Sobel gradient filter kernels are separable, and have the following fixed values:
-1
0 * [1 2 1]
1
and
1
2 * [ -1 0 1 ]
1
The Prewitt filter kernels are also separable, with the following fixed values:
1
1 * [ -1 0 1 ]
1
and
1
0 * [ 1 1 1 ]
1
Block Diagram
The high-level architecture of the 2D Edge Detector core is diagrammed in
Figure 2-1.
Figure 2-1. 2D Edge Detector IP Core Block Diagram
dvalid_in
frmsync_in
din[ ]
ready
Line Buffers
Windowing
Logic
pwrite
paddr[ ]
pwdat[ ]
prdat [ ]
Dynamic
Parameters
Registers
Active
Region
Selection
Coefficient
Selection
Multiply-Add
Threshold
Logic
dout
frmsync_out
dvalid_out
IPUG86_01.0, February 2011
4
2D Edge Detector IP Core User’s Guide
Lattice Semiconductor
Functional Description
Input data is stored in line buffers, then passed to windowing logic for edge mode handling and data alignment.
Optional control inputs allow real-time specification of the portion of the input frame used to generate output pixels
(referred to as the “active region”).
Windowed data and coefficients are sent to the arithmetic unit which multiplies the data values by their correspond-
ing coefficients and sums the multiplication results. Horizontal and vertical gradients are calculated, their outputs
are summed, and then the sum is compared to the value on the core’s threshold input. Values exceeding the
threshold result in a ‘1’ on the dout output port, which is ‘0’ otherwise.
Active Region Selection
The 2D Edge Detector may be configured to allow the user to dynamically alter the coordinates of the active region
of the input frame. The active region concept is illustrated in
Figure 2-2.
Figure 2-2. 2D Edge Detector IP Core Active Regions
0,0
upleftX,
upleftY
Active Region
upleftX+actwidth,
upleftY+actheight
VWIDTH_IN,
VHEIGHT_IN
The upleftX and upleftY ports set the coordinates of the first pixel in the input frame that will have a corresponding
pixel in the output frame. The actwidth and actheight ports determine the region of pixels in the input frame that will
have corresponding pixels in the output frame. Both sets of inputs – upleft, and active region – are synchronized
internally and delivered to the core logic at the appropriate time to avoid anomalies when moving from frame to
