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FDG8842CZ

750mA, 30V, 2 CHANNEL,N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET, ROHS COMPLIANT, SC-70, 6 PIN

器件类别:分立半导体    晶体管   

厂商名称:Rochester Electronics

厂商官网:https://www.rocelec.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Rochester Electronics
零件包装代码
SC-70
包装说明
ROHS COMPLIANT, SC-70, 6 PIN
针数
6
Reach Compliance Code
unknown
配置
SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压
30 V
最大漏极电流 (ID)
0.75 A
最大漏源导通电阻
0.4 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss)
25 pF
JESD-30 代码
R-PDSO-G6
JESD-609代码
e3
湿度敏感等级
1
元件数量
2
端子数量
6
工作模式
ENHANCEMENT MODE
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
极性/信道类型
N-CHANNEL AND P-CHANNEL
认证状态
COMMERCIAL
表面贴装
YES
端子面层
MATTE TIN
端子形式
GULL WING
端子位置
DUAL
处于峰值回流温度下的最长时间
30
晶体管应用
SWITCHING
晶体管元件材料
SILICON
文档预览
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FDG8842CZ Complementary PowerTrench
®
MOSFET
April 2007
FDG8842CZ
Complementary PowerTrench MOSFET
Q1:30V,0.75A,0.4Ω; Q2:–25V,–0.41A,1.1Ω
Features
Q1: N-Channel
Max r
DS(on)
= 0.4Ω at V
GS
= 4.5V, I
D
= 0.75A
Max r
DS(on)
= 0.5Ω at V
GS
= 2.7V, I
D
= 0.67A
Q2: P-Channel
Max r
DS(on)
= 1.1Ω at V
GS
= –4.5V, I
D
= –0.41A
Max r
DS(on)
= 1.5Ω at V
GS
= –2.7V, I
D
= –0.25A
Very low level gate drive requirements
operation in 3V circuits(V
GS(th)
<1.5V)
Very small package outline SC70-6
RoHS Compliant
allowing direct
®
tm
General Description
These N & P-Channel logic level enhancement mode field effect
transistors are produced using Fairchild’s proprietary, high cell
density, DMOS technology. This very high density process is
especially
tailored
to minimize on-state resistance.
This
device has been designed especially for low voltage applica-
tions as a replacement for bipolar digital transistors and small
signal MOSFETs. Since bias resistors are not required, this dual
digital FET can replace several different digital transistors, with
different bias resistor values.
S2
G2
D1
D2
G1
S1
SC70-6
Pin 1
S1
G1
D2
Q2
S2
Q1
D1
G2
MOSFET Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DS
V
GS
I
D
P
D
T
J
, T
STG
Drain to Source Voltage
Gate to Source Voltage
Drain Current
-Continuous
-Pulsed
Power Dissipation for Single Operation
Operating and Storage Junction Temperature Range
(Note 1a)
(Note 1b)
Parameter
Q1
30
±12
0.75
2.2
0.36
0.30
–55 to +150
Q2
–25
–8
–0.41
–1.2
Units
V
V
A
W
°C
Thermal Characteristics
R
θJA
R
θJA
Thermal Resistance, Junction to Ambient Single operation
Thermal Resistance, Junction to Ambient Single operation
(Note 1a)
(Note 1b)
350
415
°C/W
Package Marking and Ordering Information
Device Marking
.42
Device
FDG8842CZ
Reel Size
7”
Tape Width
8mm
Quantity
3000 units
©2007 Fairchild Semiconductor Corporation
FDG8842CZ Rev.B
1
www.fairchildsemi.com
FDG8842CZ Complementary PowerTrench
®
MOSFET
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Off Characteristics
BV
DSS
ΔBV
DSS
ΔT
J
I
DSS
I
GSS
Drain to Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= 250μA, V
GS
= 0V
I
D
= –250μA, V
GS
= 0V
I
D
= 250μA, referenced to 25°C
I
D
= –250μA, referenced to 25°C
V
DS
= 24V, V
GS
= 0V
V
DS
= –20V, V
GS
= 0V
V
GS
= ±12V, V
DS
= 0V
V
GS
= –8V, V
DS
= 0V
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
30
–25
25
–21
1
–1
±10
–100
V
mV/°C
μA
μA
nA
On Characteristics
V
GS(th)
ΔV
GS(th)
ΔT
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= 250μA
V
GS
= V
DS
, I
D
= –250μA
I
D
= 250μA, referenced to 25°C
I
D
= –250μA, referenced to 25°C
V
GS
= 4.5V, I
D
= 0.75A
V
GS
= 2.7V, I
D
= 0.67A
V
GS
= 4.5V, I
D
= 0.75A ,T
J
= 125°C
V
GS
= –4.5V, I
D
= –0.41A
V
GS
= –2.7V, I
D
= –0.25A
V
GS
= –4.5V, I
D
= –0.41A ,T
J
= 125°C
V
DS
= 5V, I
D
= 0.75A
V
DS
= –5V, I
D
= –0.41A
Q1
Q2
Q1
Q2
Q1
0.65
–0.65
1.0
–0.8
–3.0
1.8
0.25
0.29
0.36
0.87
1.20
1.22
3
8
0.4
0.5
0.6
1.1
1.5
1.9
1.5
–1.5
V
mV/°C
r
DS(on)
Static Drain to Source On
Resistance
Ω
Q2
Q1
Q2
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Q1
V
DS
= 10V, V
GS
= 0V, f= 1MHZ
Q2
V
DS
= –10V, V
GS
= 0V, f= 1MHZ
Q1
Q2
Q1
Q2
Q1
Q2
90
70
20
30
15
15
120
100
30
40
25
25
pF
pF
pF
Switching Characteristics
(note 2)
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
Q1
V
DD
= 5V, I
D
= 0.5A,
V
GS
= 4.5V,R
GEN
= 6Ω
Q2
V
DD
= –5V, I
D
= –0.5A,
V
GS
= –4.5V,R
GEN
= 6Ω
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
4
6
1
16
9
35
1
40
1.03
1.20
0.29
0.31
0.17
0.22
10
12
10
29
18
56
10
64
1.44
1.68
ns
ns
ns
ns
nC
nC
nC
Q1
V
GS
=4.5V, V
DD
= 5V, I
D
= 0.75A
Q2
V
GS
= –4.5V, V
DD
= –5V, I
D
= –0.41A
©2007 Fairchild Semiconductor Corporation
FDG8842CZ Rev.B
2
www.fairchildsemi.com
FDG8842CZ Complementary PowerTrench
®
MOSFET
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Drain-Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode Forward Voltage
V
GS
= 0V, I
S
= 0.3A
V
GS
= 0V, I
S
= –0.3A
(Note 2)
(Note 2)
Q1
Q2
Q1
Q2
0.76
–0.84
0.3
–0.3
1.2
–1.2
A
V
Notes:
1. R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θJC
is guaranteed by design while
R
θJA
is determined by the user's board design.
a. 350°C/W when mounted on a
1 in
2
pad of 2 oz copper .
b. 415°C/W when mounted on a minimum pad
of 2 oz copper.
Scale 1:1 on letter size paper.
2. Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
©2007 Fairchild Semiconductor Corporation
FDG8842CZ Rev.B
3
www.fairchildsemi.com
FDG8842CZ Complementary PowerTrench
®
MOSFET
Typical Characteristics (Q1 N-Channel)
T
J
= 25°C unless otherwise noted
2.20
V
GS
= 2.7V
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
V
GS
= 4.5V
2.6
V
GS
= 2.0V
V
GS
= 1.8V
1.76
I
D
,
DRAIN CURRENT (A)
2.2
1.8
1.4
1.0
0.6
0.00
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
= 2.0V
1.32
0.88
0.44
0.00
0.0
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
V
GS
=1.8V
V
GS
= 3.5V
V
GS
= 2.7V
V
GS
= 1.5V
V
GS
= 4.5V
0.5
1.0
1.5
V
DS
,
DRAIN TO SOURCE VOLTAGE (V)
2.0
0.44
0.88
1.32
1.76
2.20
I
D
,
DRAIN CURRENT(A)
Figure 1. On-Region Characteristics
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
0.8
SOURCE ON-RESISTANCE
(
Ω
)
1.6
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
1.4
1.2
1.0
0.8
0.6
-50
I
D
= 0.75A
V
GS
= 4.5V
I
D
=0.38A
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
r
DS(on)
, DRAIN TO
0.6
T
J
= 125
o
C
0.4
T
J
= 25
o
C
0.2
-25
0
25
50
75
100
o
125
150
1
2
3
4
5
T
J
, JUNCTION TEMPERATURE
(
C
)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On - Resistance
vs Junction Temperature
2.20
I
S
, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance vs Gate to
Source Voltage
2
I
D
, DRAIN CURRENT (A)
1.76
1.32
0.88
0.44
0.00
0.0
PULSE DURATION = 80
μ
s
DUTY CYCLE = 0.5%MAX
VDD = 5V
1
V
GS
= 0V
0.1
T
J
= 150
o
C
T
J
= 25
o
C
T
J
= 150
o
C
T
J
=
T
J
25
o
C
0.01
T
J
= -55
o
C
= -55
o
C
0.5
1.0
1.5
2.0
V
GS
, GATE TO SOURCE VOLTAGE (V)
2.5
0.001
0.2
0.4
0.6
0.8
1.0
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2007 Fairchild Semiconductor Corporation
FDG8842CZ Rev.B
4
www.fairchildsemi.com
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