FDS6685
October 2000
FDS6685
P-Channel Logic Level PowerTrench
MOSFET
General Description
This P-Channel Logic Level MOSFET is produced using
Fairchild Semiconductor's advanced PowerTrench process
that has been especially tailored to minimize on-state
resistance and yet maintain superior switching
performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and
fast switching are required.
Features
•
-8.8 A, -30 V. R
DS(ON)
= 0.020
Ω
@ V
GS
= -10 V
R
DS(ON)
= 0.035
Ω
@ V
GS
= -4.5 V
Extended V
GSS
range (
±
25V) for battery applications.
Low gate charge (19nC typical).
Fast switching speed.
High performance trench technology for extremely
low R
DS(ON)
.
High power and current handling capability.
•
•
•
•
•
Applications
•
•
•
Battery protection
Load switch
Motor drives
D
D
D
D
5
6
7
4
3
2
1
SO-8
Symbol
V
DSS
V
GSS
I
D
P
D
S
S
S
G
8
Absolute Maximum Ratings
Drain-Source Voltage
Gate-Source Voltage
Drain Current
- Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
Parameter
Ratings
-30
±25
(Note 1a)
Units
V
V
A
W
-8.8
-50
2.5
1.2
1
-55 to +150
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
stg
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
Package Outlines and Ordering Information
Device Marking
FDS6685
Device
FDS6685
Reel Size
13’’
Tape Width
12mm
Quantity
2500 units
2000
Fairchild Semiconductor International
FDS6685 Rev. C
FDS6685
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
T
A
= 25°C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V, I
D
= -250
µA
I
D
= -250
µA,Referenced
to 25°C
V
DS
= -24 V, V
GS
= 0 V
V
GS
= 25 V, V
DS
= 0 V
V
GS
= -25 V, V
DS
= 0 V
Min
-30
Typ
Max Units
V
Off Characteristics
-24
-1
100
-100
mV/°C
µA
nA
nA
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain-Source
On-Resistance
On-State Drain Current
Forward Transconductance
V
DS
= V
GS
, I
D
= -250
µA
I
D
= -250
µA,Referenced
to 25°C
V
GS
= -10 V, I
D
= -8.8 A
V
GS
= -10 V, I
D
= -8.8 A,T
J
=125°C
V
GS
= -4.5 V, I
D
= -6.7 A
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -8.8 A
-1
-2
5
0.015
0.023
0.026
-3
V
mV/°C
0.020
0.032
0.035
Ω
I
D(on)
g
FS
-25
20
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
DS
= -15 V, V
GS
= 0 V,
f = 1.0 MHz
1680
545
220
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= -15 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
Ω
12
15
55
23
22
27
90
37
27
ns
ns
ns
ns
nC
nC
nC
V
DS
= -10 V, I
D
= -8.8 A,
V
GS
= -5 V,
19
6.8
7.2
Drain-Source Diode Characteristics and Maximum Ratings
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= -2.1 A
(Note 2)
-2.1
-0.52
-1.2
A
V
Notes:
1:
R
θJA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface of the
drain pins. R
θJC
is guaranteed by design while R
θJA
is determined by the user's board design.
a) 50° C/W when
mounted on a 1 in
2
pad of 2 oz. copper.
b) 105° C/W when
mounted on a 0.04 in
2
pad of 2 oz. copper.
c) 125° C/W on a minimum
mounting pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
2:
Pulse Test: Pulse Width
≤
300
µs,
Duty Cycle
≤
2.0%
FDS6685 Rev. C
FDS6685
Typical Characteristics
50
2.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= -10V
-6.0V
-5.0V
-4.5V
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
-4.5V
-5.0V
-6.0V
-7.0V
-8.0V
-10V
V
GS
= -4.0V
-I
D
, DRAIN CURRENT (A)
40
-7.0V
30
-4.0V
20
10
-3.5V
0
0
1
2
3
4
5
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
0
10
20
30
40
50
-I
D
, DIRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage
0.06
R
DS(ON)
, ON-RESISTANCE (OHM)
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= -8.8A
V
GS
= -10V
1.4
I
D
= -4.4A
0.05
0.04
0.03
T
A
= 125 C
0.02
0.01
0
T
A
= 25 C
o
o
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
o
125
150
3
4
5
6
7
8
9
10
T
J
, JUNCTION TEMPERATURE ( C)
-V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
with Temperature
50
25 C
125
o
C
-I
S
, REVERSE DRAIN CURRENT (A)
100
Figure 4. On-Resistance Variation
with Gate-to-Source Voltage
V
DS
= -5V
-I
D
, DRAIN CURRENT (A)
40
T
A
= -55
o
C
o
V
GS
= 0V
10
1
0.1
-55
o
C
0.01
0.001
0.0001
T
A
= 125
o
C
25
o
C
30
20
10
0
1
2
3
4
5
6
-V
GS
, GATE TO SOURCE VOLTAGE (V)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature
FDS6685 Rev. C
FDS6685
Typical Characteristics
10
-V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= -8.8A
(continued)
2500
V
DS
= -5V
-10V
f = 1 MHz
V
GS
= 0 V
2000
CAPACITANCE (pF)
C
ISS
1500
8
-15V
6
4
1000
2
500
C
OSS
C
RSS
0
0
5
10
15
20
25
30
35
Q
g
, GATE CHARGE (nC)
0
0
5
10
15
20
25
30
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate-Charge Characteristics
Figure 8. Capacitance Characteristics
100
R
DS(ON)
LIMIT
-I
D
, DRAIN CURRENT (A)
10
100µs
1ms
10ms
100ms
1
DC
V
GS
= -10V
SINGLE PULSE
o
R
θJA
= 125 C/W
T
A
= 25 C
0.01
0.1
1
10
100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
o
50
SINGLE PULSE
40
POWER (W)
R
θ
JA
= 125 C/W
T
A
= 25 C
30
o
o
1s
10s
20
0.1
10
0
0.001
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
TR ANSI ENT T ER M
H
AL RESISTANC E
1
0.5
0.2
0.1
0
.05
0
.02
0
.01
0. 05
0
0. 02
0
0. 01
0
0.0
001
0. 01
0
0
.01
0.1
t
1
, TI M E (s e c )
1
10
100
300
D= 0
.5
0
.2
0
.1
005
.
0. 2
0
0
.01
S i n g le P ul s e
r(t), NORM AL
IZED EFFECTIVE
R
θ
J A
(t) = r(t) * R
θ
J A
R
θ
J A
= 125°C /W
P(pk )
t
1
t
2
T
J
- T
A
= P * R
θ
J ( )
A t
D u t y C y c l e, D = t
1
/t
2
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient themal response will change depending on the circuit board design.
FDS6685 Rev. C
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration:
Figure 1.0
Packaging Description:
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
SOIC (8lds) Packaging Information
Pin 1
D84Z
TNR
500
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Standard
(no flow code)
TNR
2,500
L86Z
Rail/Tube
95
F011
TNR
4,000
SOIC-8 Unit Orientation
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
13" Dia
343x64x343
5,000
0.0774
0.6060
-
530x130x83
30,000
0.0774
-
13" Dia
343x64x343
8,000
0.0774
0.9696
7" Dia
184x187x47
1,000
0.0774
0.1182
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
F63TNLabel
F63TN Label
ESD Label
(F63TNR)3
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
SOIC(8lds) Tape Leader and Trailer
Configuration:
Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
©2000 Fairchild Semiconductor International
July 1999, Rev. B
模拟与混合信号
