3LD, TO-252, NOT COMPLIANT TO JEDEC TO-252 VAR. AB, SURFACE MOUNT (DPAK)
Reach Compliance Code
not_compliant
ECCN代码
EAR99
Samacsys Description
MOSFET N-CH 200V 7.6A DPAK
雪崩能效等级(Eas)
180 mJ
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
200 V
最大漏极电流 (Abs) (ID)
7.6 A
最大漏极电流 (ID)
7.6 A
最大漏源导通电阻
0.38 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-252
JESD-30 代码
R-PSSO-G2
JESD-609代码
e3
湿度敏感等级
1
元件数量
1
端子数量
2
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
极性/信道类型
N-CHANNEL
最大功率耗散 (Abs)
51 W
最大脉冲漏极电流 (IDM)
30.4 A
认证状态
Not Qualified
表面贴装
YES
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子位置
SINGLE
处于峰值回流温度下的最长时间
30
晶体管应用
SWITCHING
晶体管元件材料
SILICON
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FQD10N20L
— N-Channel QFET
®
MOSFET
November
2013
FQD10N20L
N-Channel QFET
®
MOSFET
200
V,
7.6
A,
360
mΩ
Description
Features
7.6
A,
200
V, R
DS(on)
=
360
mΩ (Max.) @ V
GS
= 10 V,
I
D
= 3.8 A
Low Gate Charge (Typ.
13
nC)
Low Crss (Typ.
14
pF)
100% Avalanche Tested
Low
Level Gate Drive Requirements Allowing
Direct Operation
Form
Logic Drivers
This N-Channel enhancement mode power MOSFET is
•
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
•
resistance, and to provide superior switching performance
•
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, active power
•
factor correction (PFC), and electronic lamp ballasts.