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FSL9130R3

5A, 100V, 0.68ohm, P-CHANNEL, Si, POWER, MOSFET, TO-205AF, HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN

器件类别:分立半导体    晶体管   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Renesas(瑞萨电子)
零件包装代码
BCY
包装说明
HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN
针数
4
Reach Compliance Code
not_compliant
ECCN代码
EAR99
其他特性
RADIATION HARDENED
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
100 V
最大漏极电流 (Abs) (ID)
5 A
最大漏极电流 (ID)
5 A
最大漏源导通电阻
0.68 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-205AF
JESD-30 代码
O-MBCY-W3
JESD-609代码
e0
元件数量
1
端子数量
3
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
封装主体材料
METAL
封装形状
ROUND
封装形式
CYLINDRICAL
极性/信道类型
P-CHANNEL
最大功率耗散 (Abs)
25 W
最大脉冲漏极电流 (IDM)
15 A
认证状态
Not Qualified
表面贴装
NO
端子面层
Tin/Lead (Sn/Pb)
端子形式
WIRE
端子位置
BOTTOM
晶体管应用
SWITCHING
晶体管元件材料
SILICON
Base Number Matches
1
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FSL9130D,
FSL9130R
June 1998
5A, -100V, 0.680 Ohm, Rad Hard,
SEGR Resistant, P-Channel Power MOSFETs
Description
The Discrete Products Operation of Intersil Corporation has
developed a series of Radiation Hardened MOSFETs specif-
ically designed for commercial and military space applica-
tions. Enhanced Power MOSFET immunity to Single Event
Effects (SEE), Single Event Gate Rupture (SEGR) in particu-
lar, is combined with 100K RADS of total dose hardness to
provide devices which are ideally suited to harsh space envi-
ronments. The dose rate and neutron tolerance necessary
for military applications have not been sacrificed.
The Intersil portfolio of SEGR resistant radiation hardened
MOSFETs includes N-Channel and P-Channel devices in a
variety of voltage, current and on-resistance ratings.
Numerous packaging options are also available.
This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the vertical DMOS (VDMOS) struc-
ture. It is specially designed and processed to be radiation
tolerant. The MOSFET is well suited for applications
exposed to radiation environments such as switching regula-
tion, switching converters, motor drives, relay drivers and
drivers for high-power bipolar switching transistors requiring
high speed and low gate drive power. This type can be
operated directly from integrated circuits.
Reliability screening is available as either commercial, TXV
equivalent of MIL-S-19500, or Space equivalent of
MIL-S-19500. Contact Intersil for any desired deviations
from the data sheet.
Features
• 5A, -100V, r
DS(ON)
= 0.680Ω
• Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
• Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm
2
with
V
DS
up to 80% of Rated Breakdown and
V
GS
of 10V Off-Bias
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BV
DSS
- Typically Survives 2E12 if Current Limited to I
DM
• Photo Current
- 1.5nA Per-RAD(Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications
for 3E13 Neutrons/cm
2
- Usable to 3E14 Neutrons/cm
2
Ordering Information
RAD LEVEL
10K
10K
100K
100K
100K
SCREENING LEVEL
Commercial
TXV
Commercial
TXV
Space
PART NUMBER/BRAND
FSL9130D1
FSL9130D3
FSL9130R1
FSL9130R3
FSL9130R4
Symbol
D
G
Formerly available as type TA17736.
S
Package
TO-205AF
D
G
S
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
©
Intersil Corporation 1999
File Number
4083.2
3-173
FSL9130D, FSL9130R
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
FSL9130D, FSL9130R
-100
-100
5
3
15
±20
25
10
0.20
15
5
15
-55 to 150
300
UNITS
V
V
A
A
A
V
W
W
W/
o
C
A
A
A
o
C
o
C
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DS
Drain to Gate Voltage (R
GS
= 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DGR
Continuous Drain Current
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
D
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GS
Maximum Power Dissipation
T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
T
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure). . . . . . . . . . . . . . . . . . . . . . I
AS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
S
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
(Distance >0.063in (1.6mm) from Case, 10s Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
TEST CONDITIONS
I
D
= 1mA, V
GS
= 0V
V
GS
= V
DS
,
I
D
= 1mA
T
C
= -55
o
C
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
T
C
= 25
o
C
T
C
= 125
o
C
MIN
-100
-
-2.0
-1.0
-
-
-
-
-
T
C
= 25
o
C
T
C
= 125
o
C
-
-
-
-
-
-
V
GS
= 0V to -20V
V
GS
= 0V to -12V
V
GS
= 0V to -2V
V
DD
= -50V,
I
D
= 5A
-
-
-
-
-
I
D
= 5A, V
DS
= -15V
V
DS
= -25V, V
GS
= 0V,
f = 1MHz
-
-
-
-
-
-
TYP
-
-
-
-
-
-
-
-
-
0.390
-
-
-
-
-
-
32
-
5.2
13
-6
830
300
80
-
-
MAX
-
-7.0
-6.0
-
25
250
100
200
-3.57
0.680
1.12
65
140
120
120
61
41
2.5
7.4
18
-
-
-
-
5.0
175
UNITS
V
V
V
V
µA
µA
nA
nA
V
ns
ns
ns
ns
nC
nC
nC
nC
nC
V
pF
pF
pF
o
C/W
o
C/W
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
I
DSS
V
DS
= -80V,
V
GS
= 0V
V
GS
=
±20V
Gate to Source Leakage Current
I
GSS
Drain to Source On-State Voltage
Drain to Source On Resistance
V
DS(ON)
r
DS(ON)12
V
GS
= -12V, I
D
= 5A
I
D
= 3A,
V
GS
= -12V
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate Charge at 12V
Threshold Gate Charge
Gate Charge Source
Gate Charge Drain
Plateau Voltage
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
t
d(ON)
t
r
t
d(OFF)
t
f
Q
g(TOT)
Q
g(12)
Q
g(TH)
Q
gs
Q
gd
V
(PLATEAU)
C
ISS
C
OSS
C
RSS
R
θ
JC
R
θ
JA
V
DD
= -50V, I
D
= 5A,
R
L
= 10Ω, V
GS
= -12V,
R
GS
= 7.5Ω
3-174
FSL9130D, FSL9130R
Source to Drain Diode Specifications
PARAMETER
Forward Voltage
Reverse Recovery Time
SYMBOL
V
SD
t
rr
TEST CONDITIONS
I
SD
= 5A
I
SD
= 5A, dI
SD
/dt = 100A/µs
MIN
-0.6
-
TYP
-
-
MAX
-1.8
170
UNITS
V
ns
Electrical Specifications up to 100K RAD
PARAMETER
Drain to Source Breakdown Volts
Gate to Source Threshold Volts
Gate to Body Leakage
Zero Gate Leakage
Drain to Source On-State Volts
Drain to Source On Resistance
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
(Note 3)
(Note 3)
(Notes 2, 3)
(Note 3)
(Notes 1, 3)
(Notes 1, 3)
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
V
DS(ON)
r
DS(ON)12
TEST CONDITIONS
V
GS
= 0, I
D
= 1mA
V
GS
= V
DS
, I
D
= 1mA
V
GS
=
±20V,
V
DS
= 0V
V
GS
= 0, V
DS
= -80V
V
GS
= -12V, I
D
= 5A
V
GS
= -12V, I
D
= 3A
MIN
-100
-2.0
-
-
-
-
MAX
-
-6.0
100
25
-3.57
0.680
UNITS
V
V
nA
µA
V
3. Insitu Gamma bias must be sampled for both V
GS
= -12V, V
DS
= 0V and V
GS
= 0V, V
DS
= 80% BV
DSS
.
Single Event Effects (SEB, SEGR)
(Note 4)
ENVIRONMENT
(NOTE 5)
ION
SPECIES
Ni
Br
Br
Br
NOTES:
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.
5. Fluence = 1E5 ions/cm
2
(typical), T = 25
o
C.
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
TYPICAL LET
(MeV/mg/cm)
26
37
37
37
TYPICAL
RANGE (µ)
43
36
36
36
APPLIED
V
GS
BIAS
(V)
20
10
15
20
(NOTE 6)
MAXIMUM
V
DS
BIAS
(V)
-100
-100
-80
-50
TEST
Single Event Effects Safe Operating
Area
SYMBOL
SEESOA
Typical Performance Curves
Unless Otherwise Specified
1E-3
LET = 26MeV/mg/cm
2
, RANGE = 43µ
LET = 37MeV/mg/cm
2
, RANGE = 36µ
-120
FLUENCE = 1E5 IONS/cm
2
(TYPICAL)
LIMITING INDUCTANCE (HENRY)
-100
1E-4
ILM = 10A
30A
1E-5
100A
300A
1E-6
-80
V
DS
(V)
-60
-40
-20
TEMP = 25
o
C
0
0
5
10
V
GS
(V)
15
20
25
1E-7
-10
-30
-100
DRAIN SUPPLY (V)
-300
-1000
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT
GAMMA DOT CURRENT TO I
AS
3-175
FSL9130D, FSL9130R
Typical Performance Curves
6
50
T
C
= 25
o
C
5
I
D
, DRAIN CURRENT (A)
10
100µs
Unless Otherwise Specified
(Continued)
I
D
, DRAIN (A)
4
3
1ms
2
1
OPERATION IN THIS
AREA MAY BE
LIMITED BY r
DS(ON)
0.1
-1
10ms
100ms
1
0
-50
0
50
100
150
T
C
, CASE TEMPERATURE (
o
C)
-10
-100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
2.5
PULSE DURATION = 250ms, V
GS
= -12V, I
D
= 3A
2.0
-12V
Q
G
NORMALIZED r
DS(ON)
1.5
Q
GS
Q
GD
1.0
V
G
0.5
CHARGE
0.0
-80
-40
0
40
80
120
160
T
J
, JUNCTION TEMPERATURE (
o
C)
FIGURE 5. BASIC GATE CHARGE WAVEFORM
FIGURE 6. NORMALIZED r
DS(ON)
vs JUNCTION TEMPERATURE
THERMAL RESPONSE (Z
θ
JC
)
1
0.5
0.2
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θ
JC
+ T
C
10
-3
10
-2
10
-1
t
1
t
2
10
0
10
1
P
DM
NORMALIZED
0.1
0.001
10
-5
10
-4
t, RECTANGULAR PULSE DURATION (s)
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
3-176
FSL9130D, FSL9130R
Typical Performance Curves
40
Unless Otherwise Specified
(Continued)
I
AS
, AVALANCHE CURRENT (A)
10
STARTING T
J
= 25
o
C
STARTING T
J
= 150
o
C
1
0.1
IF R = 0
t
AV
= (L) (IAS) / (1.3 RATED BV
DSS
- V
DD
)
IF R
0
t
AV
= (L/R) ln [(IAS*R) / (1.3 RATED BV
DSS
- V
DD
) + 1]
1
t
AV
, TIME IN AVALANCHE (ms)
10
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN I
AS
IS REACHED
V
DS
L
+
CURRENT I
TRANSFORMER
AS
BV
DSS
t
P
I
AS
+
V
DS
V
DD
-
VARY t
P
TO OBTAIN
REQUIRED PEAK I
AS
0V
t
P
50Ω
-
DUT
50Ω
V
DD
50V-150V
V
GS
20V
t
AV
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS
V
DD
t
ON
t
d(ON)
t
OFF
t
d(OFF)
t
r
t
f
90%
R
L
V
DS
0V
DUT
V
DS
90%
10%
10%
V
GS
= -12V
90%
R
GS
V
GS
10%
50%
PULSE WIDTH
50%
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
3-177
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参数对比
与FSL9130R3相近的元器件有:FSL9130R1。描述及对比如下:
型号 FSL9130R3 FSL9130R1
描述 5A, 100V, 0.68ohm, P-CHANNEL, Si, POWER, MOSFET, TO-205AF, HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN 5A, 100V, 0.68ohm, P-CHANNEL, Si, POWER, MOSFET, TO-205AF, HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN
是否Rohs认证 不符合 不符合
厂商名称 Renesas(瑞萨电子) Renesas(瑞萨电子)
零件包装代码 BCY BCY
包装说明 HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN HERMETIC SEALED, METAL CAN, TO-205AF, 3 PIN
针数 4 4
Reach Compliance Code not_compliant not_compliant
ECCN代码 EAR99 EAR99
其他特性 RADIATION HARDENED RADIATION HARDENED
配置 SINGLE WITH BUILT-IN DIODE SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压 100 V 100 V
最大漏极电流 (Abs) (ID) 5 A 5 A
最大漏极电流 (ID) 5 A 5 A
最大漏源导通电阻 0.68 Ω 0.68 Ω
FET 技术 METAL-OXIDE SEMICONDUCTOR METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码 TO-205AF TO-205AF
JESD-30 代码 O-MBCY-W3 O-MBCY-W3
JESD-609代码 e0 e0
元件数量 1 1
端子数量 3 3
工作模式 ENHANCEMENT MODE ENHANCEMENT MODE
最高工作温度 150 °C 150 °C
封装主体材料 METAL METAL
封装形状 ROUND ROUND
封装形式 CYLINDRICAL CYLINDRICAL
极性/信道类型 P-CHANNEL P-CHANNEL
最大功率耗散 (Abs) 25 W 25 W
最大脉冲漏极电流 (IDM) 15 A 15 A
认证状态 Not Qualified Not Qualified
表面贴装 NO NO
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
端子形式 WIRE WIRE
端子位置 BOTTOM BOTTOM
晶体管应用 SWITCHING SWITCHING
晶体管元件材料 SILICON SILICON
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