FOUNDATION™ Digital
Single or Dual Channel
DSP Compression System
GA3216 PRELIMINARY DATA SHEET
FEATURES
• efficient, high fidelity 1 or 2-channel WDRC signal
processing
• fully programmable via serial data interface
• SOUNDDESIGN™ high-fidelity audio quality
• four trimmer inputs plus volume control
• flexible trimmer/parameter assignments
• optional two-terminal or three-terminal trimmers
• choice of wideband or independent 2-channel level
detection
• choice of two strategies for AGC-I parametric
adjustment
• 6, 12 or 24 dB/octave band split filter or configurable
as single-channel compressor.
• in-channel, low level squelch control (1:2 expansion)
• output compression limiting (AGC-O)
• flexible pre- and post-emphasis filters
• four independent memories
• pulse-density-modulated output stage drives zero-
bias 2-terminal receivers
thinSTAX™ PACKAGING
Hybrid typical dimensions:
0.190 x 0.123 x 0.060in
(4.82 x 3.12 x 1.52mm)
DESCRIPTION
The GA3216 hybrid is a trimmer-configurable DSP system
based on a two-channel compression circuit. It can
efficiently replace traditional hearing-aid compression
circuits without compromising fundamental performance
requirements.
A trimmer interface supports manual circuit configuration. It
continuously monitors trimmer positions and translates them
into the hearing-aid parameters of choice. A serial data
interface provides full programmability both at the factory
and in the field.
The GA3216 includes in-channel squelch to attenuate
microphone and circuit noise in quiet environments. It also
includes
low-distortion
compression
limiting
and
programmable high and low cut filters as well as five
configurable equalization filters. Unused blocks can be
powered down to save battery current, for example, when
using the device in single-channel mode.
The GA3216 Hybrid code programmed into the GC5020
controller chip is '1'.
This datasheet is part of a set of documents available for
this product. Please refer to
Getting Started with Foundation
Digital,
document #25786 for a list of other documents.
GA3216
MS2
14
MS
13
SDA
12
PROGRAMMING
INTERFACE
EEPROM
TONE
GENERATOR
1st or 2nd
ORDER
HC
EQ1
EQ4
VB
11
VREG2
19
VREG
1
REGULATOR
TWIN DETECTOR
HP
COMPRESSOR
TWIN DETECTOR
Σ
EQ5
10
8
9
7
VBP
OUT+
OUT -
PGND
IN
16
T
17
A/D
T-coil EQ
1st to 3rd
ORDER
LC
24db/oct
BAND SPLIT
FILTER
SQUELCH
PEAK
CLIPPING
D/A
HBRIDGE
COMPRESSOR
LP
TWIN DETECTOR
SQUELCH
AGC-O
EQ2
TWIN DETECTOR
MGND
15
TRIMMER INTERFACE
EQ3
VC GAIN
GA3216
5
2
3
4
18
20
6
VC
TR1
TR2
TR3
TR4
GND2
GND1
BLOCK DIAGRAM
Doc.No.24501 - 3 [Rev. February 2004]
1 of 14
ABSOLUTE MAXIMUM RATING
Operating Temperature Range
Storage Temperature Range
Absolute Maximum Power Dissipation
Input ESD Voltage
Maximum Operating Supply Voltage
Absolute Maximum Supply Voltage
-10°C to 40°C
-20°C to 70°C
25mW
PAD CONNECTION
VREG
TR1
TR2
TR3
VC
GND1
PGND
1
2
3
4
5
6
7
T
17
18
19
VREG2
20
GND2
2000V
1.5VDC
2VDC
15
IN
16
8
OUT+
GA3216
TR4
9
OUT -
14
13
12
11
10
MGND
MS2
MS
SDA
VB
VBP
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
CAUTION
LEVEL 3 MOISTURE
SENSITIVE DEVICES
DO NOT OPEN PACKAGES EXCEPT UNDER
CONTROLLED CONDITIONS
ELECTRICAL CHARACTERISTICS
Conditions: Supply Voltage V
B
= 1.3V; Temperature = 25°C, 16 kHz bandwidth
PARAMETER
Hybrid Current
SYMBOL
Ι
AMP
Ι
AMP
V
BOFF
V
BON
CONDITIONS
All functions, 24kHz sampling rate
All functions, 32kHz sampling rate
Ramp down
Ramp up
V
BON -
V
BOFF
Ramp down
MIN
-
-
0.95
1.065
-
1.06
1.20
100k
-
TYP
540
650
-
1.10
150
1.10
1.30
-
130
16
12
83
29
-
-
2.048
MAX
-
-
0.980
1.160
-
1.14
-
-
-
-
-
84
30
1
3
2.115
UNITS
µA
µA
V
V
mV
V
V
cycles
Hz
kHz
kHz
dB
dB
%
%
MHz
Minimum Operating Supply Voltage
Supply Voltage Turn on Threshold
Supply Voltage Hysteresis
Low Battery Warning Voltage
Supply Voltage During Communication
EEPROM Burn Cycles
Low Frequency System Bandwidth
High Frequency System Bandwidth
Total Maximum System Gain
Converter Gain
Total Harmonic Distortion
THD at Maximum Input
Clock Frequency
REGULATOR
Regulator Voltage
Regulator Supply Rejection
VOLUME CONTROL AND TRIMMERS
Volume Control or Trimmer Resistance
Volume Control or Trimmer Resistance
Volume Control Range
V
BC
During Communication
Note 2
32 kHz sampling frequency
24 kHz sampling frequency
A
V
A
CONV
THD
THD
M
ƒ
clk
V
IN
= -95 dBV @ 3kHz; squelch disabled
See Note 1.
A/D + D/A gain.
V
IN
= -40 dBV
V
IN
= -14 dBV, HRX - ON
-
-
82
28
-
-
1.963
V
REG
PSRR
REG
0.87
-
0.90
36
0.93
-
V
dB
R
VC
R
VC
∆A
Two-Terminal Trimmer. See Note 3.
Three-Terminal Trimmer. See Note 3.
-
0.1
-
200
-
48
-
1
-
kΩ
MΩ
dB
2 of 14
24501 - 3
ELECTRICAL CHARACTERISTICS
(Continued)
Conditions: Supply Voltage V
B
= 1.3V; Temperature = 25°C, 16 kHz bandwidth
PARAMETER
MS AND MS2 INPUT
Pull Down/Up Resistance
Logic 1 Voltage
Logic 0 Voltage
INPUT
Input Referred Noise
Input Impedance
Crosstalk
Maximum Input Level
Input Dynamic Range
A/D Dynamic Range
OUTPUT
Maximum RMS Output Voltage
D/A Dynamic Range
Output Impedance
SDA INPUT
Logic 0 Voltage
Logic 1 Voltage
SDA OUTPUT
Synchronization Time
(Synchronization Pulse Width)
T
SYNC
Baud = 0
Baud = 1
Baud = 2
237
118
59
250
125
62.5
263
132
66
µs
µs
µs
Note 2
Note 2
0
1
-
-
0.3
1.3
V
V
Z
OUT
0dBFS ƒ = 1kHz
Bandwidth 100Hz - 8kHz
-
-
-
-1
83
10
-
-
20
dBV
dB
Ω
HRX - ON, Bandwidth 100Hz - 8kHz
Bandwidth 100Hz - 8kHz
IRN
Z
IN
Between microphone and telecoil inputs
Bandwidth 100Hz - 8kHz
-
13.5
-
-
-
-
-
16
-60
-14
95
86
-108
18.5
-
-
-
-
dBV
kΩ
dB
dBV
dB
dB
-
-
-
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1
V
REG
0
-
-
-
MΩ
V
V
GA3216
NOTE 1: Total System Gain consists of:
Wideband System Gain
+
High and Low Independent Channel Gains
+
Converter Gain
Total System Gain is calibrated during Cal/Config process.
NOTE 2: Sample tested.
NOTE 3: Volume control is log taper, trimmers are linear taper.
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETER
TELECOIL
Telecoil Gain
Low Pass compensation Filter
FREQUENCY SHAPING
Crossover Frequency
High Cut Filter
High Cut Filter Order
Low Cut Filter
Low Cut Filter Order
Equalization Filter Center
Equalization Filter Depth
Equalization Filter Q
0.125
-30
0.7079
0.01
6, 12 or 18
16
30
70.7946
0.5
1
6 or 12
3
4.25
16
kHz
kHz
dB/Octave
kHz
dB/Octave
kHz
dB
type 1, 2
type 1, 2
type 1, 2
N/A
type 1, 2
-8
0.5
23
1
dB
kHz
type 3
type 1
MIN
MAX
UNIT
ACCURACY
3 of 14
24501 - 3
ELECTRICAL CHARACTERISTICS
(Continued)
INDEPENDENT CHANNEL PROCESSING
Bandsplit Filter Slopes
Low Level Gain
High Level Gain
Lower Threshold
Upper Threshold
Compression Ratio
AGCi Attack Time Constant (Fast & Slow)
AGCi Release Time Constant (Fast & Slow)
Squelch Expansion Ratio
Squelch Threshold
Squelch Attack Time Constant
Squelch Release Time Constant
WIDEBAND SYSTEM GAIN
Wideband System Gain
Wideband Attack Time Constant (Fast & Slow)
Wideband Release Time Constant (Fast & Slow)
External VC
Internal VC Attenuator
TOTAL SYSTEM GAIN
Total System Gain
AGC
O
AGCo Output Limiting
AGCo Compression Ratio
AGCo Attack Time Constant (Fast & Slow)
AGCo Release Time Constant (Fast & Slow)
PEAK CLIPPER
PC Output Limiting
TONE GENERATOR
Pure Tone Frequency (memory and low battery indicator)
Pure Tone Amplitude (memory and low battery indicator)
0.25
-50
16
0
kHz
dBFS
type 1, 2
type 3
-40
0
dBFS
type 3
0.25
0.25
-30
-1
dBFS*
Ratio
8192
8192
ms
ms
type 3
N/A
type 1, 3
type 1, 3
-19
83
dB
Note 1
-36
0.25
0.25
-48
-48
12
8192
8192
0
0
dB
ms
ms
dB
dB
type 3
type 1, 3
type 1, 3
type 3
type 3
20
0.25
0.25
-18
-18
30
70
1:1
0.25
0.25
1:2
60
8192
8192
6, 12 or 24
42
42
110
110
dB/Octave
dB
dB
dBSPL
dBSPL
Ratio
ms
ms
ratio
dBSPL
ms
ms
type 1, 2
type 3
type 3
type 3
type 3
type 3
type 1, 3
type 1, 3
N/A
type 3
type 1, 3
type 1, 3
GA3216
∞
:1
8192
8192
∞
:1
*
peak output is defined as largest sine wave possible at the resonant frequency of the receiver
NOTE 1: Total System Gain consists of
Wideband System Gain
+
High and Low Independent Channel Gains
+
Converter Gain
and
accuracy of this parameter is dependent on accuracy of the components.
Accuracy definitions:
type 1: accuracy is determined by the clock frequency deviation
type 2: accuracy is determined by the quantization error of 16bit coefficient and 20bit or higher data word.
type 3: accuracy is determined by the quantization error of a parameter word (see table 2 for word length) and 20bit or higher data word.
4 of 14
24501 - 3
V
B
MS2
14
MS
13
SDA
12
PROGRAMMING
INTERFACE
EEPROM
TONE
GENERATOR
1st or 2nd
ORDER
HC
EQ1
EQ4
PEAK
CLIPPING
D/A
HBRIDGE
11
GA3216
VREG2
19
VREG
IN
16
3k9
1k
A/D
T-coil EQ
1st to 3rd
ORDER
LC
1
REGULATOR
TWIN DETECTOR
HP
24db/oct
BAND SPLIT
FILTER
COMPRESSOR
TWIN DETECTOR
SQUELCH
Σ
EQ5
10
OUT
17
8
9
7
LP FILTER
T
COMPRESSOR
LP
TWIN DETECTOR
SQUELCH
AGC-O
EQ2
TWIN DETECTOR
MGND
15
TRIMMER INTERFACE
EQ3
VC GAIN
GA3216
5
2
3
4
18
20
6
VC
TR1
TR2 TR3
TR4
Fig. 1 Test Circuit
V
B
MS2
MS
To Programming box
14
19
1
REGULATOR
13
12
PROGRAMMING
INTERFACE
EEPROM
TONE
GENERATOR
1st or 2nd
ORDER
HC
EQ1
EQ4
PEAK
CLIPPING
11
TWIN DETECTOR
HP
COMPRESSOR
TWIN DETECTOR
Σ
EQ5
10
8
9
7
16
17
A/D
T-coil EQ
1st to 3rd
ORDER
LC
24db/oct
BAND SPLIT
FILTER
SQUELCH
D/A
HBRIDGE
COMPRESSOR
LP
TWIN DETECTOR
SQUELCH
AGC-O
EQ2
TWIN DETECTOR
15
TRIMMER INTERFACE
EQ3
VC GAIN
GA3216
5
2
3
4
18
20
6
VC
200k(log)
Fig. 2 Example of Programmable Application Circuit
5 of 14
24501 - 3
