HB52RF648DC-B, HB52RD648DC-B
512 MB Unbuffered SDRAM S.O.DIMM
64-Mword
×
64-bit, 133/100 MHz Memory Bus, 2-Bank Module
(16 pcs of 32 M
×
8 components)
PC133/100 SDRAM
E0083H40 (Ver. 4.0)
Nov. 16, 2001 (K) Japan
Description
The HB52RF648DC, HB52RD648DC are a 32M
×
64
×
2 banks Synchronous Dynamic RAM Small Outline
Dual In-line Memory Module (S.O.DIMM), mounted 16 pieces of 256-Mbit SDRAM (HM5225805BTB)
sealed in TCP package and 1 piece of serial EEPROM (2-kbit) for Presence Detect (PD). An outline of the
products is 144-pin Zig Zag Dual tabs socket type compact and thin package. Therefore, they make high
density mounting possible without surface mount technology. They provide common data inputs and outputs.
Decoupling capacitors are mounted beside TCP on the module board.
Note: Do not push the cover or drop the modules in order to protect from mechanical defects, which would
be electrical defects.
Features
•
Fully compatible with: JEDEC standard outline 8-byte S.O.DIMM
•
144-pin Zig Zag Dual tabs socket type (dual lead out)
Outline: 67.60 mm (Length)
×
31.75 mm (Height)
×
3.80 mm (Thickness)
Lead pitch: 0.80 mm
•
3.3 V power supply
•
Clock frequency: 133/100 MHz (max)
•
LVTTL interface
•
Data bus width:
×
64 Non parity
•
Single pulsed
RAS
•
4 Banks can operates simultaneously and independently
•
Burst read/write operation and burst read/single write operation capability
•
Programmable burst length : 1/2/4/8
Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.
HB52RF648DC-B, HB52RD648DC-B
•
2 variations of burst sequence
Sequential
Interleave
•
Programmable
CE
latency: 2/3
•
Byte control by DQMB
•
Refresh cycles: 8192 refresh cycles/64 ms
•
2 variations of refresh
Auto refresh
Self refresh
•
Low self refresh current: HB52RF648DC-xxBL (L-version)
: HB52RD648DC-xxBL (L-version)
Ordering Information
Type No.
HB52RF648DC-75B*
1
HB52RF648DC-75BL*
1
HB52RD648DC-A6B*
1
HB52RD648DC-A6BL*
1
HB52RD648DC-B6B*
2
HB52RD648DC-B6BL*
2
Frequency
133 MHz
133 MHz
100 MHz
100 MHz
100 MHz
100 MHz
CE
latency
3
3
2/3
2/3
3
3
Package
Contact pad
Small outline DIMM (144-pin) Gold
Notes: 1. 100 MHz operation at
CE
latency = 2.
2. 66 MHz operation at
CE
latency = 2.
Data Sheet E0083H40
2
HB52RF648DC-B, HB52RD648DC-B
Pin Arrangement
Front Side
1pin
2pin
59pin
60pin
61pin
62pin
143pin
144pin
Back Side
Front side
Pin No.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
Signal name Pin No.
V
SS
DQ0
DQ1
DQ2
DQ3
V
CC
DQ4
DQ5
DQ6
DQ7
V
SS
DQMB0
DQMB1
V
CC
A0
A1
A2
V
SS
DQ8
DQ9
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
Back side
Signal name Pin No.
NC
V
SS
NC
NC
V
CC
DQ16
DQ17
DQ18
DQ19
V
SS
DQ20
DQ21
DQ22
DQ23
V
CC
A6
A8
V
SS
A9
A10 (AP)
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
Signal name Pin No.
V
SS
DQ32
DQ33
DQ34
DQ35
V
CC
DQ36
DQ37
DQ38
DQ39
V
SS
DQMB4
DQMB5
V
CC
A3
A4
A5
V
SS
DQ40
DQ41
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
Signal name
CK1
V
SS
NC
NC
V
CC
DQ48
DQ49
DQ50
DQ51
V
SS
DQ52
DQ53
DQ54
DQ55
V
CC
A7
BA0
V
SS
BA1
A11
Data Sheet E0083H40
3
HB52RF648DC-B, HB52RD648DC-B
Front side
Pin No.
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
Signal name Pin No.
DQ10
DQ11
V
CC
DQ12
DQ13
DQ14
DQ15
V
SS
NC
NC
CK0
V
CC
RE
W
S0
S1
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
Back side
Signal name Pin No.
V
CC
DQMB2
DQMB3
V
SS
DQ24
DQ25
DQ26
DQ27
V
CC
DQ28
DQ29
DQ30
DQ31
V
SS
SDA
V
CC
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
Signal name Pin No.
DQ42
DQ43
V
CC
DQ44
DQ45
DQ46
DQ47
V
SS
NC
NC
CKE0
V
CC
CE
CKE1
A12
NC
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
Signal name
V
CC
DQMB6
DQMB7
V
SS
DQ56
DQ57
DQ58
DQ59
V
CC
DQ60
DQ61
DQ62
DQ63
V
SS
SCL
V
CC
Data Sheet E0083H40
4
HB52RF648DC-B, HB52RD648DC-B
Pin Description
Pin name
A0 to A12
Function
Address input
Row address A0 to A12
Column address A0 to A9
BA0/BA1
DQ0 to DQ63
S0/S1
RE
CE
W
DQMB0 to DQMB7
CK0/CK1
CKE0/CKE1
SDA
SCL
V
CC
V
SS
NC
Bank select address
Data-input/output
Chip select
Row address asserted bank enable
Column address asserted
Write enable
Byte input/output mask
Clock input
Clock enable
Data-input/output for serial PD
Clock input for serial PD
Power supply
Ground
No connection
Data Sheet E0083H40
5
