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IC62LV1024AL-55B

128K x 8 Ultra Low Power and Low VCC SRAM

器件类别:存储    存储   

厂商名称:ISSI(芯成半导体)

厂商官网:http://www.issi.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
ISSI(芯成半导体)
包装说明
6 X 8 MM, TFBGA-32
Reach Compliance Code
compliant
最长访问时间
55 ns
I/O 类型
COMMON
JESD-30 代码
R-PBGA-B32
JESD-609代码
e0
内存密度
1048576 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
湿度敏感等级
3
功能数量
1
端子数量
32
字数
131072 words
字数代码
128000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
128KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
BGA
封装等效代码
BGA36,6X8,30
封装形状
RECTANGULAR
封装形式
GRID ARRAY
并行/串行
PARALLEL
电源
3/3.3 V
认证状态
Not Qualified
最大待机电流
0.00003 A
最小待机电流
2 V
最大压摆率
0.035 mA
最大供电电压 (Vsup)
3.3 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
BALL
端子节距
0.75 mm
端子位置
BOTTOM
Base Number Matches
1
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IC62LV1024AL
IC62LV1024ALL
Document Title
128K x 8 Ultra Low Power and Low V
CC
SRAM
Revision History
Revision No
0A
History
Initial Draft
Draft Date
Remark
September 13,2001
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
LPSR017-0A 09/13/2001
1
IC62LV1024AL
IC62LV1024ALL
128K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
• Access times of 45, 55, and 70 ns
Low active power: 60 mW (typical)
Low standby power: 15 µW (typical) CMOS
standby
• Low data retention voltage: 2V (min.)
• Available in Low Power (-L) and
Ultra Low Power (-LL)
• Output Enable (OE) and two Chip Enable
(CE1 and CE2) inputs for ease in applications
• TTL compatible inputs and outputs
• Single 2.7V to 3.3V power supply
DESCRIPTION
The
ICSI
IC62LV1024AL and IC62LV1024ALL are low power
and low Vcc,131,072-word by 8-bit CMOS static RAMs. They
are fabricated using
ICSI
's high-performance CMOS technology.
This highly reliable process coupled with innovative circuit
design techniques, yields higher performance and low power
consumption devices.
When
CE1
is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip Enable
inputs,
CE1
and CE2. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
The IC62LV1024AL and IC62LV1024ALL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1, 450mil SOP and 48-pin
6*8mm TF-BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
512 X 2048
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
LPSR017-0A 09/13/2001
IC62LV1024AL
IC62LV1024ALL
PIN CONFIGURATION
32-Pin SOP
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
PIN CONFIGURATION
32-Pin 8x20mm TSOP-1 and 8x13.4mm TSOP-1
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
48-Pin 6x8mm TF-BGA
PIN DESCRIPTIONS
A0-A16
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
Input/Output
No Connection
Power
Ground
CE1
CE2
OE
WE
I/O0-I/O7
NC
Vcc
GND
1
A
B
C
D
E
F
G
H
A0
I/O
5
I/O
6
GND
Vcc
I/O
7
I/O
8
A9
2
A1
A2
3
CE2
WE
NC
4
A3
A4
A5
5
A6
A7
6
A8
I/O
1
I/O
2
Vcc
GND
NC
OE
A10
CE1
A11
NC
A16
A12
A15
A13
I/O
3
I/O
4
A14
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
2.7V to 3.3V
2.7V to 3.3V
Integrated Circuit Solution Inc.
LPSR017-0A 09/13/2001
3
IC62LV1024AL
IC62LV1024ALL
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
WE
X
X
H
H
L
CE1
H
X
L
L
L
CE2
X
L
H
H
H
OE
X
X
H
L
X
I/O Operation
High-Z
High-Z
High-Z
D
OUT
D
IN
Vcc Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
V
CC
T
BIAS
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Vcc related to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
Value
–0.5 to +3.6
–0.3 to +3.6
–40 to +85
–65 to +150
0.7
Unit
V
V
°C
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation of the
device at these or any other conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, Vcc = 3.0V.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
CC
= Min., I
OH
= –1.0 mA
V
CC
= Min., I
OL
= 2.1 mA
Min.
2.2
2.2
–0.3
–1
–1
Max.
0.4
V
CC
+ 0.3
0.4
1
1
Unit
V
V
V
V
µA
µA
GND
V
IN
V
CC
GND
V
OUT
V
CC
Notes:
1. V
IL
= –3.0V for pulse width less than 10 ns.
4
Integrated Circuit Solution Inc.
LPSR017-0A 09/13/2001
IC62LV1024AL
IC62LV1024ALL
IC62LV1024AL POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
I
SB
1
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
CE
= V
IL
I
OUT
= 0 mA, f = f
MAX
Com.
Ind.
-45L ns
Min. Max.
40
45
0.8
1
50
75
-55L ns
Min. Max.
35
40
0.8
1
50
75
-70L ns
Min. Max.
30
35
0.8
1
50
75
Unit
mA
mA
V
CC
= Max.,
Com.
V
IN
= V
IH
or V
IL
,
CE1
V
IH
Ind.
or CE2
V
IL
, f = 0
V
CC
= Max., f = 0
Com.
CE1
V
CC
– 0.2V,
Ind.
CE2
0.2V,
or V
IN
V
CC
– 0.2V, V
IN
0.2V
I
SB
2
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IC62LV1024ALL POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
I
SB
1
Vcc Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
CC
= Max.,
CE
= V
IL
I
OUT
= 0 mA, f = f
MAX
Com.
Ind.
-45LL ns
Min. Max.
40
45
0.8
1
5
10
-55LL ns
Min. Max.
35
40
0.8
1
5
10
-70LL ns
Min. Max.
30
35
0.8
1
5
10
Unit
mA
mA
V
CC
= Max.,
Com.
V
IN
= V
IH
or V
IL
,
CE1
V
IH
Ind.
or CE2
V
IL
, f = 0
V
CC
= Max., f = 0
Com.
CE1
V
CC
– 0.2V,
Ind.
CE2
0.2V,
or V
IN
V
CC
– 0.2V, V
IN
0.2V
I
SB
2
µA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
LPSR017-0A 09/13/2001
5
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