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IDT7381L25J

Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68

器件类别：嵌入式处理器和控制器    微控制器和处理器   

厂商名称：IDT (Integrated Device Technology)

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参数 预览 参数对比
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
IDT (Integrated Device Technology)
零件包装代码
LCC
包装说明
PLASTIC, LCC-68
针数
68
Reach Compliance Code
not_compliant
ECCN代码
3A001.A.3
其他特性
2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ
最大时钟频率
50 MHz
外部数据总线宽度
16
JESD-30 代码
S-PQCC-J68
JESD-609代码
e0
长度
24.2062 mm
湿度敏感等级
1
端子数量
68
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装形状
SQUARE
封装形式
CHIP CARRIER
峰值回流温度（摄氏度）
225
认证状态
Not Qualified
座面最大高度
4.57 mm
最大压摆率
76 mA
最大供电电压
5.25 V
最小供电电压
4.75 V
标称供电电压
5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn85Pb15)
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
30
宽度
24.2062 mm
uPs/uCs/外围集成电路类型
BIT-SLICE MICROPROCESSOR
文档预览
IDT7381
16-BIT CASCADABLE ALU
COMMERCIAL TEMPERATURE RANGE
16-BIT CMOS
CASCADABLE ALU
IDT7381
FEATURES:
−
−
−
−
−
−
−
−
−
−
−
−
−
High-performance 16-bit Arithmetic Logic Unit (ALU)
25ns to 55ns clocked ALU operations
Ideal for radar, sonar or image processing applications
74S381 instruction set (8 functions)
Replaces Gould S614381 or Logic Devices L4C381
Cascadable with or without carry look-ahead
Pipeline or flow-through modes
Internal feedback path for accumulation
Three-state outputs
TTL-compatible
Produced with advanced submicron CMOS technology
Available in PLCC
Speeds available: L/25/30/40/55
DESCRIPTION:
The IDT7381 is a high-speed cascadable Arithmetic Logic Unit (ALU).
These three-bus devices have two input registers, an ultra-fast 16-bit ALU
and 16-bit output register. With IDT’s high-performance CMOS technology,
the IDT7381 can do arithmetic or logic operations in 25ns. The IDT7381
functionally replaces four 54/74S381 four-bit ALUs in a 68-pin package.
The two input operands, A and B, can be clocked or fed through for
flexible pipelining. The F output can also be set into clocked or flow-through
mode. An output enable is provided for three-state control of the output port
on a bus.
The IDT7381 has three function pins to select 1 of 8 arithmetic or logic
operations. The two R and S selection pins determine whether A, B, F or
0 are fed into the ALU. This ALU has carry-out, propagate and generate
outputs for cascading using carry look-ahead.
FUNCTIONAL BLOCK DIAGRAM
A
0
-1 5
B
0
-1 5
16
16
ENA
A R EG
B R EG
CL K
ENB
A MUX
0000 H
R MUX
0000 H
B MUX
FT AB
S MUX
2
RS
0
-1
C
1 6
OVF
Z
P
G
I
16-BIT ALU
3
0-2
C
0
EN F
F RE G
FTF
F M UX
PO W E R
SU P P LY
16
F
0
- 15
GND
V
CC
OE
COMMERCIAL TEMPERATURE RANGE
1
c
2001
Integrated Device Technology, Inc.
APRIL 2001
DSC-2525/-
IDT7381
16-BIT CASCADABLE ALU
COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
B
14
B
15
B
13
B
12
B
11
A
8
A
7
A
3
A
5
A
4
A
1
B
10
A
2
A
0
B
9
A
6
B
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
CL K
V
CC
GND
C
16
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
8
7
6
5
4
3
1 68 67 66 65 64 63 62 61
60
Pin 1
59
Desig nato r
58
57
56
55
54
53
52
J68 - 1
51
50
49
48
47
46
45
2
B
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
ENA
ENB
FT AB
RS
1
RS
0
I
I
I
2
1
0
P
G
Z
O VF
EN F
FTF
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
C
0
F
15
F
11
F
5
F
13
F
14
F
12
F
10
F
9
F
1
F
8
F
7
F
6
F
4
F
3
OE
PLCC
TOP VIEW
2
F
2
F
0
IDT7381
16-BIT CASCADABLE ALU
COMMERCIAL TEMPERATURE RANGE
PIN DESCRIPTION
Pin Name
A
0
- A
15
B
0
- B
15
ENA
ENB
FTAB
F
0
– F
15
I/O
I
I
I
I
I
O
Description
Sixteen–bit data input port.
Sixteen–bit data input port.
Register enable for the A input port; active low pin.
Register enable for the B input port; active low pin.
Flow–through control pin. When this pin is high, both register A and B are transparent.
Sixteen–bit data output port.
Register enable for the F output port; active low pin.
Flow–through control pin. When this pin is high, the F register is transparent.
Clock input.
Output enable control pin. When this pin is high, the output port F is in a high impedance state. When low, the output
port F is active.
Carry input. This pin receives arithmetic carries from less significant ALU components in a cascade
configuration.
Carry output. This pin produces arithmetic carries to more significant ALU components in a cascaded
configuration.
This pin indicates a two’s complement arithmetic overflow, when high.
This pin indicates a zero output result, when high.
Two control pins used to select input operands for the R and S multiplexers.
Three control pins to select the ALU function performed.
Indicates the carry propagate output state to the ALU.
Indicates the carry generate output state to the ALU.
Power supply pin, 5V.
Ground pin, 0V.
ENF
FTF
CLK
OE
C
0
C
16
OVF
Z
RS
0
– RS
1
I
0
- I
2
P
G
V
CC
GND
I
I
I
I
I
O
O
O
I
I
O
O
R AND S MUX TABLE
RS
1
0
0
1
1
RS
0
0
1
0
1
R Mux
A
A
0
A
S Mux
F
0
B
B
ALU FUNCTION TABLE
I
2
0
0
0
0
1
1
1
1
I
1
0
0
1
1
0
0
1
1
I
0
0
1
0
1
0
1
0
1
F=0
F =
R
+ S + C
0
F = R +
S
+ C
0
F = R + S + C
0
F = R xor S
F = R or S
F = R and S
F = all 1’s
Function
3
IDT7381
16-BIT CASCADABLE ALU
COMMERCIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
V
CC
T
STG
I
OUT
Description
Terminal Voltage with
Respect to Ground
Power Supply Voltage
Storage Temperature
DC Output Current
Max.
–0.5 to
V
CC
+ 0.5
–0.5 to +7.0
–55 to +125
50
Unit
V
V
°C
mA
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
C
IN
Parameter
(1)
Input Capacitance
Conditions
V
IN
= 0V
Pkg.
PGA
PLCC
C
OUT
Output Capacitance
V
OUT
= 0V
PGA
PLCC
Typ.
10
5
12
7
pF
Unit
pF
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability. Under no circumstances should an input
of an I/O Pin be greater than V
CC
+ 0.5V.
NOTE:
1. This parameter is sampled at initial characterization and is not production
tested.
DC ELECTRICAL CHARACTERISTICS
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OS(3)
I
OZ
V
OH
V
OL
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Short Circuit Current
Off State (High Impedance)
Output Current
Output HIGH Voltage
Output LOW Voltage
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max., V
IN
= 2.7V
V
CC
= Max., V
IN
= 0.5V
V
CC
= Max., V
OUT
= GND
V
CC
= Max.
V
O
= 0.5V
V
O
= 2.7V
I
OH
= –4mA
I
OL
= 8mA
Min.
2
—
—
—
–20
—
—
2.4
—
Typ.
(2)
—
—
—
—
—
–0.1
–0.1
—
—
Max.
—
0.8
10
–10
–100
–20
20
—
0.5
Unit
V
V
µA
µA
mA
µA
V
V
4
IDT7381
16-BIT CASCADABLE ALU
COMMERCIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%
Symbol
I
CC
∆I
CC
(3)
I
CCD
(4)
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Input HIGH
Dynamic Power Supply Current
V
CC
= Max.
V
IN
=GND or V
CC
V
CC
= Max.
V
IN
= 3.4V
V
CC
= Max.
Outputs disabled
V
IN
= GND or V
CC
Mode: FTAB = FTF = 1
V
CC
= Max.
Outputs Disabled
All Data Inputs Disabled
f
i
= 10MHz, f
CP
= 10MHz
50% Duty Cycle
V
IL
= GND, V
IH
= V
CC
Mode: FTAB = FTF = 1
V
CC
= Max.
Outputs Enabled. (CL = 50pF)
All Data Inputs Sw itching
f
i
= 10MHz, f
CP
= 10MHz
50% Duty Cycle
V
IL
= GND, V
IH
= V
CC
Mode: FTAB = FTF = 1
I
C
(7)
Total Power Supply Current
V
CC
= Max.
V
IN
= GND or V
CC
All Data Inputs Switching
f
i
= 10MHz, f
CP
= 10MHz
50% Duty Cycle
Outputs Disabled
—
22
39
mA
Test Conditions
(1)
Min.
—
—
—
Typ.
(2)
2
0.5
15
Max.
6
1
48
Unit
mA
mA/
input
µA/
MHz
I
CCD1
Dynamic Power Supply Current
—
20
33
mA
I
CCD2
(6)
Dynamic Power Supply Current
—
40
60
mA
Outputs Enabled
—
42
76
mA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived from I
CCD1
for use in Total Power Supply calculations.
5. Total power supply current is calculated as follows:
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
+ f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
6. This parameter is not production tested but is an indicator of the power dissipated with outputs loaded.
7. Values for these conditions are examples of the I
C
formula in note 5 above. These are guaranteed but not tested.
5
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参数对比
与IDT7381L25J相近的元器件有：IDT7381L55J、IDT7381L55J8、IDT7381L25J8、IDT7381L30J8、IDT7381L40J8、IDT7381L40J、IDT7381L30J、IDT7381L20J8、IDT7381L20J。描述及对比如下：
型号 IDT7381L25J IDT7381L55J IDT7381L55J8 IDT7381L25J8 IDT7381L30J8 IDT7381L40J8 IDT7381L40J IDT7381L30J IDT7381L20J8 IDT7381L20J
描述 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, 1.27 MM PITCH, PLASTIC, LCC-68 Bit-Slice Processor, 16-Bit, CMOS, PQCC68, 1.27 MM PITCH, PLASTIC, LCC-68
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
零件包装代码 LCC LCC LCC LCC LCC LCC LCC LCC LCC LCC
包装说明 PLASTIC, LCC-68 PLASTIC, LCC-68 QCCJ, QCCJ, QCCJ, QCCJ, PLASTIC, LCC-68 PLASTIC, LCC-68 QCCJ, 1.27 MM PITCH, PLASTIC, LCC-68
针数 68 68 68 68 68 68 68 68 68 68
Reach Compliance Code not_compliant not_compliant unknown unknown unknown unknown not_compliant not_compliant unknown not_compliant
其他特性 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ 2 X 16 BIT DATA INPUT BUS; 3 CONTROL PINS TO SELECT OPERATION; ICC SPECIFIED @ 10MHZ
最大时钟频率 50 MHz 23.25 MHz 23.25 MHz 50 MHz 40 MHz 29.41 MHz 29.41 MHz 40 MHz 55.56 MHz 55.56 MHz
外部数据总线宽度 16 16 16 16 16 16 16 16 16 16
JESD-30 代码 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68 S-PQCC-J68
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0 e0 e0
长度 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm
端子数量 68 68 68 68 68 68 68 68 68 68
最高工作温度 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 QCCJ QCCJ QCCJ QCCJ QCCJ QCCJ QCCJ QCCJ QCCJ QCCJ
封装形状 SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
封装形式 CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm 4.57 mm
最大压摆率 76 mA 76 mA 76 mA 76 mA 76 mA 76 mA 76 mA 76 mA 76 mA 76 mA
最大供电电压 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V 5.25 V
最小供电电压 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V 4.75 V
标称供电电压 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子面层 Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) TIN LEAD TIN LEAD TIN LEAD TIN LEAD Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) TIN LEAD Tin/Lead (Sn85Pb15)
端子形式 J BEND J BEND J BEND J BEND J BEND J BEND J BEND J BEND J BEND J BEND
端子节距 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
端子位置 QUAD QUAD QUAD QUAD QUAD QUAD QUAD QUAD QUAD QUAD
宽度 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm 24.2062 mm
uPs/uCs/外围集成电路类型 BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR BIT-SLICE MICROPROCESSOR
ECCN代码 3A001.A.3 - - 3A001.A.3 3A991.A.2 3A991.A.2 3A991.A.2 3A991.A.2 3A001.A.3 3A001.A.3
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器件捷径:
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