IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
D REGISTERS (3-STATE)
IDT54/74FCT574/A/C
FEATURES:
−
−
−
−
−
−
−
−
−
−
IDT54/74FCT574 equivalent to FAST™ speed and drive
IDT54/74FCT574A up to 30% faster than FAST
IDT54/74FCT574C up to 50% faster than FAST
I
OL
= 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
Edge triggered master/slave, D-type flip-flops
Buffered common clock and buffered common three-state control
Military product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
•
Commercial: SOIC
•
Military: CERDIP, LCC, CERPACK
DESCRIPTION:
The FCT574 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the
OE
input is high, the
outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT574 has non-inverting outputs with respect to the data at the D
inputs.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
CP
D
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
Q
Q
Q
Q
Q
Q
Q
Q
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
JUNE 2000
DSC-5428/-
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
D
1
D
0
O
0
19
18
17
L20-2
16
15
14
9
10
11
12
13
OE
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
INDEX
2
3
4
5
6
7
8
9
10
D20-1
SO 20-2
E20-1
19
18
17
16
15
14
13
12
11
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
2
D
3
D
4
D
5
D
6
4
5
6
7
8
3
2
1
20
OE
1
20
V
CC
V
CC
O
1
O
2
O
3
O
4
O
5
D
7
GND
CP
O
7
(1)
Inputs
CP
CERDIP/ SOIC/ CERPACK
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Commercial
–0.5 to +7
–0.5 to V
CC
0 to +70
–55 to +125
–55 to +125
0.5
120
Military
–0.5 to +7
–0.5 to V
CC
–55 to +125
–65 to +135
–65 to +150
0.5
120
Unit
V
V
°C
°C
°C
W
mA
8-link
PIN DESCRIPTION
Pin Names
D
N
CP
O
N
OE
Description
D Flip-Flop Data Inputs
Clock Pulse for the register. Enters data on LOW-to-HIGH
transition.
3-State Outputs (true)
Active LOW 3-state Output Enable Input
FUNCTION TABLE
Function
Hi-Z
Load Register
OE
H
H
L
L
H
H
O
6
Outputs Internal
D
N
X
X
L
H
L
H
O
N
Z
Z
L
H
Z
Z
Q
N
NC
NC
H
L
H
L
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed V
CC
by +.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
CP
L
H
↑
↑
↑
↑
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8-link
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
NC = No Change
↑
= LOW-to-HIGH transition
NOTE:
1. This parameter is measured at characterization but not tested.
2
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V ± 10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300µ A
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µ A
I
OL
= 32mA MIL.
I
OL
= 48mA COM'L.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (High Impedance)
Output Current
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.5
0.5
V
V
mA
V
µA
Unit
V
V
µA
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
3
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC;
V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
fi = 5MHz
50% Duty Cycle
One Bit Toggling
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
Eight Bits Toggling
fi = 2.5MHz
50% Duty Cycle
V
IN
≥
V
HC
V
IN
≤
V
LC
Min.
—
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
2.2
6
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
4
7.8
(5)
—
6.2
16.8
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTER (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
54/74FCT574
Com'l.
Mil.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Parameter
Propagation Delay
CP to O
N
Output Enable Time
Output Disable Time
Set-up Time HIGH
or LOW, D
N
to CP
Hold Time HIGH
or LOW, D
N
to CP
CP Pulse Width
HIGH or LOW
Conditions
(1)
C
L
= 50pF
R
L
= 500Ω
54/74FCT574A
Com'l.
Mil.
54/74FCT574C
Com'l.
Mil.
Unit
Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max. Min
.(2)
Max.
2
1.5
1.5
2
1.5
7
10
12.5
8
—
—
—
2
1.5
1.5
2
1.5
7
11
14
8
—
—
—
2
1.5
1.5
2
1.5
5
6.5
6.5
5.5
—
—
—
2
1.5
1.5
2
1.5
6
7.2
7.5
6.5
—
—
—
2
1.5
1.5
2
1.5
5
5.2
5.5
5
—
—
—
2
1.5
1.5
2
1.5
6
6.2
6.2
5.7
—
—
—
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
