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IPU09N03LAGBKMA1

Power Field-Effect Transistor, 50A I(D), 25V, 0.015ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251AA, ROHS COMPLIANT, PLASTIC, TO-251, 3 PIN

器件类别:分立半导体    晶体管   

厂商名称:Infineon(英飞凌)

厂商官网:http://www.infineon.com/

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器件参数
参数名称
属性值
厂商名称
Infineon(英飞凌)
包装说明
IN-LINE, R-PSIP-T3
Reach Compliance Code
compliant
ECCN代码
EAR99
其他特性
LOGIC LEVEL COMPATIBLE
雪崩能效等级(Eas)
75 mJ
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
25 V
最大漏极电流 (ID)
50 A
最大漏源导通电阻
0.015 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-251AA
JESD-30 代码
R-PSIP-T3
元件数量
1
端子数量
3
工作模式
ENHANCEMENT MODE
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
IN-LINE
极性/信道类型
N-CHANNEL
最大脉冲漏极电流 (IDM)
350 A
表面贴装
NO
端子形式
THROUGH-HOLE
端子位置
SINGLE
晶体管应用
SWITCHING
晶体管元件材料
SILICON
Base Number Matches
1
文档预览
IPD09N03LA G
IPS09N03LA G
IPF09N03LA G
IPU09N03LA G
OptiMOS
®
2 Power-Transistor
Features
• Ideal for high-frequency dc/dc converters
• Qualified according to JEDEC for target application
• N-channel, logic level
• Excellent gate charge x
R
DS(on)
product (FOM)
• Superior thermal resistance
• 175 °C operating temperature
• Pb-free lead plating; RoHS compliant
1)
Product Summary
V
DS
R
DS(on),max
(SMD version)
I
D
25
8.6
50
V
mΩ
A
Type
IPD09N03LA
IPF09N03LA
IPS09N03LA
IPU09N03LA
Package
Marking
P-TO252-3-11
09N03LA
P-TO252-3-23
09N03LA
P-TO251-3-11
09N03LA
P-TO251-3-21
09N03LA
Maximum ratings,
at
T
j
=25 °C, unless otherwise specified
Parameter
Continuous drain current
Symbol Conditions
I
D
T
C
=25 °C
2)
T
C
=100 °C
Pulsed drain current
Avalanche energy, single pulse
Reverse diode dv /dt
Gate source voltage
4)
Power dissipation
Operating and storage temperature
IEC climatic category; DIN IEC 68-1
I
D,pulse
E
AS
dv /dt
V
GS
P
tot
T
j
,
T
stg
T
C
=25 °C
T
C
=25 °C
3)
I
D
=45 A,
R
GS
=25
I
D
=50 A,
V
DS
=20 V,
di /dt =200 A/µs,
T
j,max
=175 °C
Value
50
45
350
75
6
±20
63
-55 ... 175
55/175/56
mJ
kV/µs
V
W
°C
Unit
A
Rev. 2.0
page 1
2007-04-03
IPD09N03LA G
IPS09N03LA G
Parameter
Symbol Conditions
min.
Thermal characteristics
Thermal resistance, junction - case
SMD version, device on PCB
R
thJC
R
thJA
minimal footprint
6 cm
2
cooling area
5)
Electrical characteristics,
at
T
j
=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage
Gate threshold voltage
Zero gate voltage drain current
V
(BR)DSS
V
GS
=0 V,
I
D
=1 mA
V
GS(th)
I
DSS
V
DS
=V
GS
,
I
D
=20 µA
V
DS
=25 V,
V
GS
=0 V,
T
j
=25 °C
V
DS
=25 V,
V
GS
=0 V,
T
j
=125 °C
Gate-source leakage current
Drain-source on-state resistance
I
GSS
R
DS(on)
V
GS
=20 V,
V
DS
=0 V
V
GS
=4.5 V,
I
D
=30 A
V
GS
=4.5 V,
I
D
=30 A,
SMD version
V
GS
=10 V,
I
D
=30 A
V
GS
=10 V,
I
D
=30 A,
SMD version
Gate resistance
Transconductance
R
G
g
fs
|V
DS
|>2|I
D
|R
DS(on)max
,
I
D
=30 A
25
1.2
-
-
1.6
0.1
-
-
-
-
-
-
Values
typ.
IPF09N03LA G
IPU09N03LA G
Unit
max.
2.4
75
50
K/W
-
2
1
V
µA
-
-
-
-
-
-
-
23
10
10
12
11.8
7.4
7.2
1
46
100
100
15
14.8
8.8
8.6
-
-
S
nA
mΩ
1)
J-STD20 and JESD22
Current is limited by bondwire; with an
R
thJC
=2.4 K/W the chip is able to carry 67 A.
See figure 3
T
j,max
=150 °C and duty cycle
D
<0.25 for
V
GS
<-5 V
2)
3)
4)
5)
2
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Rev. 2.0
page 2
2007-04-03
IPD09N03LA G
IPS09N03LA G
Parameter
Symbol Conditions
min.
Dynamic characteristics
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Gate Charge Characteristics
6)
Gate to source charge
Gate charge at threshold
Gate to drain charge
Switching charge
Gate charge total
Gate plateau voltage
Gate charge total, sync. FET
Output charge
Reverse Diode
Diode continous forward current
Diode pulse current
Diode forward voltage
I
S
I
S,pulse
V
SD
T
C
=25 °C
V
GS
=0 V,
I
F
=50 A,
T
j
=25 °C
V
R
=15 V,
I
F
=I
S
,
di
F
/dt =400 A/µs
-
-
-
-
-
0.97
Q
gs
Q
g(th)
Q
gd
Q
sw
Q
g
V
plateau
Q
g(sync)
Q
oss
V
DS
=0.1 V,
V
GS
=0 to 5 V
V
DD
=15 V,
V
GS
=0 V
V
DD
=15 V,
I
D
=25 A,
V
GS
=0 to 5 V
-
-
-
-
-
-
-
-
4.3
2.0
2.8
5.2
10
3.5
8.7
10
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DD
=15 V,
V
GS
=10 V,
I
D
=25 A,
R
G
=2.7
V
GS
=0 V,
V
DS
=15 V,
f
=1 MHz
-
-
-
-
-
-
-
1235
474
61
7.0
5.6
20
3.4
Values
typ.
IPF09N03LA G
IPU09N03LA G
Unit
max.
1642
630
92
10
8.4
30
5.1
pF
ns
5.7
2.6
4.3
7.3
13
-
12
14
nC
V
nC
50
350
1.2
A
V
Reverse recovery charge
Q
rr
-
-
10
nC
6)
See figure 16 for gate charge parameter definition
Rev. 2.0
page 3
2007-04-03
IPD09N03LA G
IPS09N03LA G
1 Power dissipation
P
tot
=f(T
C
)
2 Drain current
I
D
=f(T
C
);
V
GS
≥10
V
IPF09N03LA G
IPU09N03LA G
70
60
60
50
50
40
P
tot
[W]
40
I
D
[A]
30
20
10
0
0
50
100
150
200
30
20
10
0
0
50
100
150
200
T
C
[°C]
T
C
[°C]
3 Safe operating area
I
D
=f(V
DS
);
T
C
=25 °C;
D
=0
parameter:
t
p
1000
4 Max. transient thermal impedance
Z
thJC
=f(t
p
)
parameter:
D
=t
p
/T
10
1 µs
limited by on-state
resistance
100
10 µs
0.5
1
I
D
[A]
100 µs
DC
Z
thJC
[K/W]
0.2
0.1
0.05
10
1 ms
0.1
0.02
0.01
10 ms
single pulse
1
0.1
1
10
100
0.01
0
0
0
0
0
0
1
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
V
DS
[V]
t
p
[s]
Rev. 2.0
page 4
2007-04-03
IPD09N03LA G
IPS09N03LA G
5 Typ. output characteristics
I
D
=f(V
DS
);
T
j
=25 °C
parameter:
V
GS
60
10 V
4.5 V
4.1 V
IPF09N03LA G
IPU09N03LA G
6 Typ. drain-source on resistance
R
DS(on)
=f(I
D
);
T
j
=25 °C
parameter:
V
GS
28
3.2 V
3.5 V
3.8 V
4.1 V
50
24
20
40
3.8 V
R
DS(on)
[m
]
16
4.5 V
I
D
[A]
30
3.5 V
12
20
8
3.2 V
10 V
10
3V
2.8 V
4
0
0
1
2
3
0
0
20
40
60
V
DS
[V]
I
D
[A]
7 Typ. transfer characteristics
I
D
=f(V
GS
); |V
DS
|>2|I
D
|R
DS(on)max
parameter:
T
j
100
8 Typ. forward transconductance
g
fs
=f(I
D
);
T
j
=25 °C
60
80
50
40
60
g
fs
[S]
40
20
175 °C
25 °C
I
D
[A]
30
20
10
0
0
1
2
3
4
5
0
0
10
20
30
40
50
60
V
GS
[V]
I
D
[A]
Rev. 2.0
page 5
2007-04-03
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