PD - 94107
Advanced Process Technology
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Dynamic dv/dt Rating
l
175°C Operating Temperature
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Fast Switching
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Fully Avalanche Rated
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Ease of Paralleling
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Simple Drive Requirements
Description
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Fifth Generation HEXFET
®
Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast switching
speed and ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation levels
to approximately 50 watts. The low thermal resistance and
low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to
2.0W in a typical surface mount application.
IRF644N
IRF644NS
IRF644NL
HEXFET
®
Power MOSFET
D
V
DSS
= 250V
R
DS(on)
= 240mΩ
G
S
I
D
= 14A
TO-220AB
IRF644N
D
2
Pak
IRF644NS
TO-262
IRF644NL
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
14
9.9
56
150
1.0
± 20
180
8.4
15
7.9
-55 to + 175
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
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1
3/15/01
IRF644N/644NS/644NL
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
D
L
S
C
iss
C
oss
C
rss
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
250
–––
–––
2.0
8.8
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.33
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
10
21
30
17
4.5
7.5
1060
140
38
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
240
mΩ V
GS
= 10V, I
D
= 8.4A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 50V, I
D
= 8.4A
25
V
DS
= 250V, V
GS
= 0V
µA
250
V
DS
= 200V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
54
I
D
= 8.4A
9.2
nC
V
DS
= 200V
26
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
= 125V
–––
I
D
= 8.4A
ns
–––
R
G
= 6.2Ω
–––
V
GS
= 10V, See Fig. 10
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
V
GS
= 0V
–––
V
DS
= 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
14
––– –––
showing the
A
G
integral reverse
56
––– –––
S
p-n junction diode.
––– ––– 1.3
V
T
J
= 25°C, I
S
= 14A, V
GS
= 0V
––– 165 250
ns
T
J
= 25°C, I
F
= 14A
––– 1.0 1.6
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Thermal Resistance
Parameter
R
θJC
R
θCS
R
θJA
R
θJA
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Junction-to-Ambient (PCB mount)**
Typ.
–––
0.50
–––
–––
Max.
1.0
–––
62
40
Units
°C/W
2
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IRF644N/644NS/644NL
100
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
100
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
10
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP
4.5V
1
4.5V
1
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
0.1
0.1
1
20µs PULSE WIDTH
Tj = 175°C
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
3.5
I
D
, Drain-to-Source Current (A)
T
J
= 175
°
C
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
I
D
= 14A
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20 0
T
J
= 25
°
C
10
1
4
6
8
10
V DS = 50V
20µs PULSE WIDTH
11
13
15
V
GS
= 10V
20 40 60 80 100 120 140 160 180
V
GS
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (
°
C)
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
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3
IRF644N/644NS/644NL
10000
20
VGS = 0V,
f = 1 MHZ
Ciss = C + C , C
gs
gd
ds SHORTED
Crss = C
gd
Coss = C + Cgd
ds
I
D
=
8.4A
V
GS
, Gate-to-Source Voltage (V)
16
V
DS
= 200V
V
DS
= 125V
V
DS
= 50V
C, Capacitance(pF)
1000
Ciss
12
Coss
100
8
Crss
4
10
1
10
100
0
0
12
24
36
48
60
VDS, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
100
1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
I
SD
, Reverse Drain Current (A)
T
J
= 175
°
C
10
ID , Drain-to-Source Current (A)
100
10
100µsec
1msec
1
T
J
= 25
°
C
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
100
10msec
0.1
0.0
V
GS
= 0 V
0.4
0.8
1.1
1.5
1000
V
SD
,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4
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IRF644N/644NS/644NL
15
V
DS
12
R
D
V
GS
R
G
I
D
, Drain Current (A)
D.U.T.
+
-
V
DD
9
V
GS
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
6
Fig 10a.
Switching Time Test Circuit
3
V
DS
90%
0
25
50
75
100
125
150
175
T
C
, Case Temperature ( ° C)
Fig 9.
Maximum Drain Current Vs.
Case Temperature
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
0.01
0.00001
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.0001
0.001
0.01
0.1
P
DM
t
1
t
2
1
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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