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IRFW710BTM

Power Field-Effect Transistor, 2A I(D), 400V, 3.4ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, D2PAK-3

器件类别:晶体管   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Fairchild
零件包装代码
D2PAK
包装说明
D2PAK-3
针数
3
Reach Compliance Code
not_compliant
Is Samacsys
N
雪崩能效等级(Eas)
100 mJ
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
400 V
最大漏极电流 (Abs) (ID)
2 A
最大漏极电流 (ID)
2 A
最大漏源导通电阻
3.4 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-263AB
JESD-30 代码
R-PSSO-G2
JESD-609代码
e3
湿度敏感等级
1
元件数量
1
端子数量
2
工作模式
ENHANCEMENT MODE
最高工作温度
150 °C
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
极性/信道类型
N-CHANNEL
最大功率耗散 (Abs)
36 W
最大脉冲漏极电流 (IDM)
6 A
认证状态
Not Qualified
表面贴装
YES
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子位置
SINGLE
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管应用
SWITCHING
晶体管元件材料
SILICON
Base Number Matches
1
文档预览
IRFW710B / IRFI710B
November 2001
IRFW710B / IRFI710B
400V N-Channel MOSFET
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supplies and
electronic lamp ballasts based on half bridge.
Features
2.0A, 400V, R
DS(on)
= 3.4Ω @V
GS
= 10 V
Low gate charge ( typical 7.7 nC)
Low Crss ( typical 6.0 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
D
!
G
!
G
S
D
2
-PAK
IRFW Series
G D S
I
2
-PAK
IRFI Series
!
S
Absolute Maximum Ratings
Symbol
V
DSS
I
D
I
DM
V
GSS
E
AS
I
AR
E
AR
dv/dt
P
D
T
C
= 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (T
C
= 25°C)
Drain Current
- Continuous (T
C
= 100°C)
Drain Current
- Pulsed
(Note 1)
IRFW710B / IRFI710B
400
2.0
1.3
6.0
±
30
(Note 2)
(Note 1)
(Note 1)
(Note 3)
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W
W/°C
°C
°C
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
A
= 25°C) *
100
2.0
3.6
5.5
3.13
36
0.29
-55 to +150
300
T
J
, T
stg
T
L
Power Dissipation (T
C
= 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
R
θJC
R
θJA
R
θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
Typ
--
--
--
Max
3.44
40
62.5
Units
°C/W
°C/W
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
IRFW710B / IRFI710B
Electrical Characteristics
Symbol
Parameter
T
C
= 25°C unless otherwise noted
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
∆BV
DSS
/
∆T
J
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate-Body Leakage Current, Forward
Gate-Body Leakage Current, Reverse
V
GS
= 0 V, I
D
= 250
µA
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 400 V, V
GS
= 0 V
V
DS
= 320 V, T
C
= 125°C
V
GS
= 30 V, V
DS
= 0 V
V
GS
= -30 V, V
DS
= 0 V
400
--
--
--
--
--
--
0.4
--
--
--
--
--
--
10
100
100
-100
V
V/°C
µA
µA
nA
nA
On Characteristics
V
GS(th)
R
DS(on)
g
FS
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
V
DS
= V
GS
, I
D
= 250
µA
V
GS
= 10 V, I
D
= 1.0 A
V
DS
= 40 V, I
D
= 1.0 A
(Note 4)
2.0
--
--
--
2.7
2.2
4.0
3.4
--
V
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
--
--
250
30
6.0
330
40
8.0
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 320 V, I
D
= 2.0 A,
V
GS
= 10 V
(Note 4, 5)
V
DD
= 200 V, I
D
= 2.0 A,
R
G
= 25
(Note 4, 5)
--
--
--
--
--
--
--
6.0
25
20
25
7.7
1.5
3.2
20
60
50
60
10
--
--
ns
ns
ns
ns
nC
nC
nC
Drain-Source Diode Characteristics and Maximum Ratings
I
S
I
SM
V
SD
t
rr
Q
rr
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
V
GS
= 0 V, I
S
= 2.0 A
Drain-Source Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0 V, I
S
= 2.0 A,
dI
F
/ dt = 100 A/µs
(Note 4)
--
--
--
--
--
--
--
--
210
0.9
2.0
6.0
1.5
--
--
A
A
V
ns
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 44mH, I
AS
= 2.0A, V
DD
= 50V, R
G
= 25
Ω,
Starting T
J
= 25°C
3. I
SD
2.0A, di/dt
300A/µs, V
DD
BV
DSS,
Starting T
J
= 25°C
4. Pulse Test : Pulse width
300µs, Duty cycle
2%
5. Essentially independent of operating temperature
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
IRFW710B / IRFI710B
Typical Characteristics
10
0
I
D
, Drain Current [A]
I
D
, Drain Current [A]
V
GS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Bottom : 5.0 V
Top :
10
0
150 C
o
10
-1
25 C
-55 C
o
o
Notes :
1. 250μ s Pulse Test
2. T
C
= 25℃
Notes :
1. V
DS
= 40V
2. 250μ s Pulse Test
10
-2
10
-1
-1
10
10
0
10
1
2
4
6
8
10
V
DS
, Drain-Source Voltage [V]
V
GS
, Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
12
10
V
GS
= 10V
R
DS(ON)
[
Ω
],
Drain-Source On-Resistance
8
V
GS
= 20V
I
DR
, Reverse Drain Current [A]
10
0
6
4
150℃
25℃
Notes :
1. V
GS
= 0V
2. 250μ s Pulse Test
2
Note : T
J
= 25
0
0
1
2
3
4
5
6
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
I
D
, Drain Current [A]
V
SD
, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
500
C
iss
= C
gs
+ C
gd
(C
ds
= shorted)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
12
V
DS
= 80V
10
400
V
DS
= 200V
V
GS
, Gate-Source Voltage [V]
Capacitance [pF]
300
C
iss
8
V
DS
= 320V
6
200
C
oss
100
Notes :
1. V
GS
= 0 V
2. f = 1 MHz
4
C
rss
2
Note : I
D
= 2.0 A
0
-1
10
10
0
10
1
0
0.0
1.5
3.0
4.5
6.0
7.5
9.0
V
DS
, Drain-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
IRFW710B / IRFI710B
Typical Characteristics
(Continued)
1.2
3.0
2.5
BV
DSS
, (Normalized)
Drain-Source Breakdown Voltage
R
DS(ON)
, (Normalized)
Drain-Source On-Resistance
1.1
2.0
1.0
1.5
1.0
0.9
Notes :
1. V
GS
= 0 V
2. I
D
= 250
μ
A
0.5
Notes :
1. V
GS
= 10 V
2. I
D
= 1.0 A
0.8
-100
-50
0
50
100
o
150
200
0.0
-100
-50
0
50
100
o
150
200
T
J
, Junction Temperature [ C]
T
J
, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
2.0
1
10
Operation in This Area
is Limited by R
DS(on)
1.6
100
µ
s
I
D
, Drain Current [A]
10
0
10 ms
DC
10
-1
Notes :
1. T
C
= 25 C
o
2. T
J
= 150 C
3. Single Pulse
o
10
-2
I
D
, Drain Current [A]
1 ms
1.2
0.8
0.4
10
0
10
1
10
2
10
3
0.0
25
50
75
100
125
150
V
DS
, Drain-Source Voltage [V]
T
C
, Case Temperature [
]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
(t), T h e r m a l R e s p o n s e
D = 0 .5
10
0
0 .2
0 .1
0 .0 5
-1
N o te s :
1 . Z
θ
J C
(t) = 3 .4 4
/W M a x .
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
J M
- T
C
= P
D M
* Z
θ
J C
(t)
θ
JC
10
0 .0 2
0 .0 1
s in g le p u ls e
P
DM
t
1
t
2
Z
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t
1
, S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
IRFW710B / IRFI710B
Gate Charge Test Circuit & Waveform
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
10V
Q
gs
Q
gd
V
GS
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
V
DS
V
GS
R
G
R
L
V
DD
V
DS
90%
10V
DUT
V
GS
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Unclamped Inductive Switching Test Circuit & Waveforms
L
V
DS
I
D
R
G
DUT
t
p
BV
DSS
1
E
AS
= ---- L I
AS2
--------------------
2
BV
DSS
- V
DD
BV
DSS
I
AS
V
DD
V
DD
t
p
I
D
(t)
V
DS
(t)
Time
10V
©2001 Fairchild Semiconductor Corporation
Rev. B, November 2001
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