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PD-91852I

RADIATION HARDENED

POWER MOSFET

SURFACE MOUNT (SMD-2)

Product Summary

Part Number Radiation Level

IRHNA57064 100K Rads (Si)

IRHNA53064 300K Rads (Si)

IRHNA54064

500K Rads (Si)

IRHNA58064 1000K Rads (Si)

IRHNA57064

JANSR2N7468U2

60V, N-CHANNEL

REF: MIL-PRF-19500/673

TECHNOLOGY

DS(on)

QPL Part Number

0.0056Ω 75A* JANSR2N7468U2

0.0056Ω 75A* JANSF2N7468U2

0.0056Ω 75A* JANSG2N7468U2

0.0065Ω 75A* JANSH2N7468U2

International Rectifier’s R5

technology provides

high performance power MOSFETs for space

applications. These devices have been characterized

for Single Event Effects (SEE) with useful performance

up to an LET of 80 (MeV/(mg/cm

)). The combination

of low

DS(on)

and low gate charge reduces the power

losses in switching applications such as DC to DC

converters and motor control. These devices retain

all of the well established advantages of MOSFETs

such as voltage control, fast switching, ease of

paralleling and temperature stability of electrical

parameters.

SMD-2

Features:

Single Event Effect (SEE) Hardened

Ultra Low R

DS(on)

Low Total Gate Charge

Simple Drive Requirements

Ease of Paralleling

Hermetically Sealed

Surface Mount

Ceramic Package

Light Weight

Absolute Maximum Ratings

Parameter

ID @ VGS = 12V, TC = 25°C

ID @ VGS = 12V, TC = 100°C

IDM

PD @ TC = 25°C

VGS

EAS

IAR

EAR

dv/dt

T STG

Continuous Drain Current

Pulsed Drain Current

Max. Power Dissipation

Linear Derating Factor

Gate-to-Source Voltage

Single Pulse Avalanche Energy

Avalanche Current

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Operating Junction

Storage Temperature Range

Pckg. Mounting Surface Temp.

Weight

* Current is limited by package

For footnotes refer to the last page

75*

300

250

2.0

±20

500

4.4

-55 to 150

300 (for 5s)

3.3 (Typical)

Pre-Irradiation

Units

W/°C

V/ns

°C

www.irf.com

10/19/11

IRHNA57064, JANSR2N7468U2

Pre-Irradiation

Electrical Characteristics

@ Tj = 25°C (Unless Otherwise Specified)

Parameter

BVDSS

Drain-to-Source Breakdown Voltage

∆BV

DSS/∆TJ Temperature Coefficient of Breakdown

Voltage

RDS(on)

Static Drain-to-Source On-State

Resistance

VGS(th)

Gate Threshold Voltage

g fs

Forward Transconductance

IDSS

Zero Gate Voltage Drain Current

Min

—

2.0

—

Typ Max Units

—

0.065

—

4.0

—

0.0056

4.0

—

100

-100

165

125

—

V/°C

Ω

µA

Test Conditions

VGS = 0V, ID = 1.0mA

Reference to 25°C, ID = 1.0mA

VGS = 12V, ID = 75A

VDS = VGS, ID = 1.0mA

VDS

≥

15V, IDS = 75A

VDS = 48V ,VGS = 0V

VDS = 48V,

VGS = 0V, TJ = 125°C

VGS = 20V

VGS = -20V

VGS =12V, ID = 45A

VDS = 30V

VDD = 30V, ID = 45A,

VGS =12V, RG = 2.35Ω

IGSS

Q gs

Q gd

(on)

(off)

LS + LD

Gate-to-Source Leakage Forward

Gate-to-Source Leakage Reverse

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain (‘Miller’) Charge

Turn-On Delay Time

Rise Time

Turn-Off Delay Time

Fall Time

Total Inductance

Measured from the center of

drain pad to center of source pad

VGS = 0V, VDS = 25V

f = 1.0MHz

Ciss

C oss

C rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

—

6080

2310

—

Source-Drain Diode Ratings and Characteristics

Parameter

ISM

VSD

trr

Q RR

ton

Continuous Source Current (Body Diode)

Pulse Source Current (Body Diode)

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Forward Turn-On Time

Min Typ Max Units

—

75*

300

1.3

200

538

Test Conditions

= 25°C, IS = 75A, VGS = 0V

Tj = 25°C, IF = 45A, di/dt

≤100A/µs

VDD

≤

25V

Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.

* Current is limited by package

Thermal Resistance

Parameter

RthJC

RthJ-PCB

Junction-to-Case

Junction-to-PC board

Min Typ Max

—

1.6

0.5

—

Units

°C/W

Test Conditions

soldered to a 2 square copper-clad board

Note: Corresponding Spice and Saber models are available on International Rectifier web site.

For footnotes refer to the last page

www.irf.com

Radiation Characteristics

IRHNA57064, JANSR2N7468U2

International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.

The hardness assurance program at International Rectifier is comprised of two radiation environments.

Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both

pre- and post-irradiation performance are tested and specified using the same drive circuitry and test

conditions in order to provide a direct comparison.

Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation

ÄÅ

Parameter

DSS

GS(th)

GSS

DSS

DS(on)

Drain-to-Source Breakdown Voltage

Gate Threshold Voltage

Gate-to-Source Leakage Forward

Gate-to-Source Leakage Reverse

Zero Gate Voltage Drain Current

Static Drain-to-Source

On-State Resistance (TO-3)

Static Drain-to-Source

On-State Resistance (SMD-2)

Diode Forward Voltage

Up to 500K Rads(Si)

1000K Rads (Si)

Units

Min

Max

Min

Max

2.0

—

4.0

100

-100

0.0061

0.0056

1.3

1.5

—

4.0

100

-100

0.0071

0.0065

1.3

µA

Ω

Test Conditions

= 0V, I

= 1.0mA

= V

, I

= 1.0mA

= 20V

= -20 V

= 48V, V

= 0V

= 12V, I

= 45A

= 12V, I

= 45A

= 0V, IS = 45A

1. Part numbers IRHNA57064 (JANSR2N7468U2), IRHNA53064 (JANSF2N7468U2) and IRHNA54064 (JANSG2N7468U2)

2. Part number IRHNA58064 (JANSH2N7468U2)

International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for

Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.

Table 2. Typical Single Event Effect Safe Operating Area

LET

(MeV/(mg/cm ))

38 ± 5%

61 ± 5%

84 ± 5%

Energy

(MeV)

300 ± 7.5%

330 ± 7.5%

350 ± 10%

Range

(µm)

38 ± 7.5%

31 ± 10%

28 ± 7.5%

@VGS =

VDS (V)

@VGS =

-5V

-10V

-15V

-20V

-5

-10

Bias VGS (V)

-15

-20

Bias VDS (V)

LET=38 ± 5%

LET=61 ± 5%

LET=84 ± 5%

Fig a.

Typical Single Event Effect, Safe Operating Area

For footnotes refer to the last page

www.irf.com

IRHNA57064, JANSR2N7468U2

Pre-Irradiation

1000

, Drain-to-Source Current (A)

100

, Drain-to-Source Current (A)

VGS

TOP

15V

12V

10V

9.0V

8.0V

7.0V

6.0V

BOTTOM 5.0V

1000

VGS

15V

12V

10V

9.0V

8.0V

7.0V

6.0V

BOTTOM 5.0V

TOP

100

5.0V

0.1

20µs PULSE WIDTH

= 25

100

, Drain-to-Source Voltage (V)

0.1

20µs PULSE WIDTH

= 150

100

, Drain-to-Source Voltage (V)

Fig 1.

Typical Output Characteristics

Fig 2.

Typical Output Characteristics

1000

2.0

= 25

= 150

DS(on)

, Drain-to-Source On Resistance

(Normalized)

= 75A

, Drain-to-Source Current (A)

1.5

100

1.0

0.5

5.0

V DS =

25V

20µs PULSE WIDTH

5.5

6.0

6.5

7.0

7.5

8.0

, Gate-to-Source Voltage (V)

0.0

-60 -40 -20

= 12V

80 100 120 140 160

, Junction Temperature (

Fig 3.

Typical Transfer Characteristics

Fig 4.

Normalized On-Resistance

Vs. Temperature

www.irf.com

Pre-Irradiation

IRHNA57064, JANSR2N7468U2

10000

8000

, Gate-to-Source Voltage (V)

= 0V,

f = 1MHz

iss

= C

+ C

gd ,

SHORTED

rss

= C

oss

= C

+ C

45A

= 48V

= 30V

C, Capacitance (pF)

6000

Ciss

Coss

4000

2000

Crss

100

FOR TEST CIRCUIT

SEE FIGURE 13

100

125

150

175

200

, Drain-to-Source Voltage (V)

, Total Gate Charge (nC)

Fig 5.

Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 6.

Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

OPERATION IN THIS AREA LIMITED BY R

on)

, Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100

= 150

1ms

10ms

Tc = 25°C

Tj = 150°C

Single Pulse

0.1

100

= 25

0.4

= 0 V

0.6

0.8

1.0

1.2

1.4

1.6

0.1

,Source-to-Drain Voltage (V)

100

VDS , Drain-to-Source Voltage (V)

Fig 7.

Typical Source-Drain Diode

Forward Voltage

Fig 8.

Maximum Safe Operating Area

www.irf.com

参数对比

与IRHNA54064PBF相近的元器件有：IRHNA53064、IRHNA54064、IRHNA57064、IRHNA57064PBF、IRHNA58064、IRHNA58064PBF。描述及对比如下：

型号	IRHNA54064PBF	IRHNA53064	IRHNA54064	IRHNA57064	IRHNA57064PBF	IRHNA58064	IRHNA58064PBF
描述	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	Power Field-Effect Transistor, 75A I(D), 60V, 0.0056ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN
是否Rohs认证	符合	不符合	不符合	不符合	符合	不符合	符合
包装说明	CHIP CARRIER, R-CBCC-N3	CHIP CARRIER, R-CBCC-N3	HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	SMD-2, 3 PIN	CHIP CARRIER, R-CBCC-N3	HERMETIC SEALED, CERAMIC, SMD-2, 3 PIN	CHIP CARRIER, R-CBCC-N3
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant
雪崩能效等级（Eas）	500 mJ	500 mJ	500 mJ	500 mJ	500 mJ	500 mJ	500 mJ
外壳连接	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN	DRAIN
配置	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压	60 V	60 V	60 V	60 V	60 V	60 V	60 V
最大漏极电流 (ID)	75 A	75 A	75 A	75 A	75 A	75 A	75 A
最大漏源导通电阻	0.0056 Ω	0.0056 Ω	0.0056 Ω	0.0056 Ω	0.0056 Ω	0.0056 Ω	0.0056 Ω
FET 技术	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR	METAL-OXIDE SEMICONDUCTOR
JESD-30 代码	R-CBCC-N3	R-CBCC-N3	R-CBCC-N3	R-CBCC-N3	R-CBCC-N3	R-CBCC-N3	R-CBCC-N3
元件数量	1	1	1	1	1	1	1
端子数量	3	3	3	3	3	3	3
工作模式	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE	ENHANCEMENT MODE
最高工作温度	150 °C	150 °C	150 °C	150 °C	150 °C	150 °C	150 °C
封装主体材料	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
峰值回流温度（摄氏度）	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
极性/信道类型	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL	N-CHANNEL
最大脉冲漏极电流 (IDM)	300 A	300 A	300 A	300 A	300 A	300 A	300 A
表面贴装	YES	YES	YES	YES	YES	YES	YES
端子形式	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD	NO LEAD
端子位置	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
处于峰值回流温度下的最长时间	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
晶体管应用	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING	SWITCHING
晶体管元件材料	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON	SILICON
Base Number Matches	1	1	1	1	1	1	1
厂商名称	Infineon(英飞凌)	-	Infineon(英飞凌)	Infineon(英飞凌)	Infineon(英飞凌)	Infineon(英飞凌)	Infineon(英飞凌)
ECCN代码	-	EAR99	EAR99	EAR99	-	EAR99	-
最大漏极电流 (Abs) (ID)	-	75 A	75 A	75 A	75 A	75 A	-
JESD-609代码	-	e0	e0	e0	-	e0	-
最大功率耗散 (Abs)	-	300 W	300 W	250 W	250 W	300 W	-
认证状态	-	Not Qualified	Not Qualified	Not Qualified	-	Not Qualified	-
端子面层	-	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	-	Tin/Lead (Sn/Pb)	-
Is Samacsys	-	-	N	N	N	N	N
其他特性	-	-	-	HIGH RELIABILITY	HIGH RELIABILITY	HIGH RELIABILITY, RADIATION HARDENED	HIGH RELIABILITY, RADIATION HARDENED