Data Sheet No. PD60252 revA
IRS2184
/
IRS21844(S)PbF
Features
·
·
·
·
·
·
·
·
·
·
·
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5 V offset
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4 A/1.8 A
RoHS compliant
Packages
HALF-BRIDGE DRIVER
8-Lead PDIP
IRS2184
14-Lead PDIP
IRS21844
14-Lead SOIC
IRS21844S
8-Lead SOIC
IRS2184S
Description
The IRS2184/IRS21844 are high volt-
age, high speed power MOSFET and
Feature Comparison
Cross-
IGBT drivers with dependent high- and
t
on
/t
off
Input
Deadtime
conduction
Ground Pins
Part
low-side referenced output channels.
logic
prevention
(ns)
(ns)
logic
Proprietary HVIC and latch immune
2181
COM
HIN/LIN
no
none
180/220
CMOS technologies enable ruggedized
21814
V
SS
/COM
monolithic construction. The logic in-
2183
Internal 400
COM
HIN/LIN
yes
180/220
21834
Program 400-5000
V
SS/
COM
put is compatible with standard CMOS
2184
Internal 400
COM
IN/SD
yes
680/270
or LSTTL output, down to 3.3 V logic. The
21844
Program 400-5000
V
SS
/COM
output drivers feature a high pulse cur-
rent buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V.
Typical Connection
V
CC
up to 600 V
V
CC
IN
SD
V
B
HO
V
S
LO
up to 600 V
TO
LOAD
IN
SD
COM
IRS2184
V
CC
IN
SD
V
CC
IN
SD
DT
V
SS
R
DT
V
SS
HO
V
B
V
S
IRS21844
TO
LOAD
(Refer to Lead Assignments for correct
configuration).These diagrams show
electrical connections only. Please refer
to our Application Notes and DesignTips
for proper circuit board layout.
COM
LO
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1
IRS2184/IRS21844(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
DT
V
IN
V
SS
dV
S
/dt
Definition
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Programmable dead-time pin voltage (IRS21844 only)
Logic input voltage (IN & SD)
Logic ground (IRS21844 only)
Allowable offset supply voltage transient
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
(8-lead PDIP)
(8-lead SOIC)
(14-lead PDIP)
(14-lead SOIC)
Min.
-0.3
V
B
- 20
V
S
- 0.3
-0.3
-0.3
V
SS
- 0.3
V
SS
- 0.3
V
CC
- 20
—
—
—
—
—
—
—
—
—
—
-50
—
Max.
620 (Note 1)
V
B
+ 0.3
V
B
+ 0.3
20 (Note 1)
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
1.6
1.0
125
200
75
120
150
150
300
Units
V
V/ns
P
D
Package power dissipation @ T
A
£
+25
°C
W
Rth
JA
Thermal resistance, junction to ambient
°C/W
T
J
T
S
T
L
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
°C
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
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2
IRS2184/IRS21844(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at a 15 V differential.
Symbol
V
B
V
S
V
St
V
HO
V
CC
V
LO
V
IN
DT
V
SS
T
A
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
Transient high-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (IN & SD)
Programmable deadtime pin voltage (IRS21844 only)
Logic ground (IRS21844 only)
Ambient temperature
Min.
V
S
+ 10
COM -8 (Note 2)
-50 (Note 3)
V
S
10
0
V
SS
V
SS
-5
-40
Max.
V
S
+ 20
600
600
V
B
20
V
CC
V
CC
V
CC
5
125
Units
V
°C
Note 2:
Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to -V
BS
. (Please refer to the Design
Tip DT97-3 for more details).
Note 3:
Operational for transient negative VS of COM - 50 V with a 50 ns pulse width. Guaranteed by design. Refer to
the Application Information section of this datasheet for more details.
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25° C, DT = V
SS
unless otherwise specified.
Symbol
ton
toff
tsd
MTon
MToff
tr
tf
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shut-down propagation delay
Delay matching, HS & LS turn-on
Delay matching, HS & LS turn-off
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
HO turn-off to LO turn-on (DT
HO-LO)
Deadtime matching = DT
LO - HO
- DT
HO-LO
Min.
—
—
—
—
—
—
—
280
4
—
—
Typ.
680
270
180
0
0
40
20
400
5
0
0
Max. Units Test Conditions
900
400
270
90
40
60
35
520
6
50
600
ms
ns
V
S
= 0 V
R
DT
= 0
W
R
DT
= 200 kW
R
DT
=0
W
R
DT
= 200 kW
ns
V
S
= 0 V
V
S
= 0 V or 600 V
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3
IRS2184/IRS21844(S)PbF
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, DT= V
SS
and T
A
= 25
°C
unless otherwise specified. The V
IL
, V
IH,
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: IN and SD. The V
O
, I
O,
and
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
SD,TH+
V
SD,TH-
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
SD input positive going threshold
SD input negative going threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.5
—
2.5
—
—
—
—
20
0.4
—
—
8.0
7.4
0.3
1.4
1.8
—
—
—
—
—
—
—
60
1.0
25
—
8.9
8.2
0.7
1.9
2.3
—
0.8
—
0.8
1.4
0.2
50
150
1.6
60
5.0
9.8
9.0
V
—
—
—
A
V
O
= 0 V,
PW
£
10
µs
V
O
= 15 V,
PW
£
10
µs
µA
mA
µA
V
I
O
= 0 A
I
O
= 20 mA
V
B
= V
S
= 600 V
V
IN
= 0 V or 5 V
IN = 5 V, SD = 0 V
IN = 0 V, SD = 5 V
V
CC
= 10 V to 20 V
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IRS2184/IRS21844(S)PbF
Functional Block Diagrams
VB
2184
IN
VSS/COM
LEVEL
SHIFT
HV
LEVEL
SHIFTER
PULSE
GENERATOR
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
DEADTIME
UV
DETECT
VCC
+5V
LO
SD
VSS/COM
LEVEL
SHIFT
DELAY
COM
VB
21844
IN
VSS/COM
LEVEL
SHIFT
HV
LEVEL
SHIFTER
PULSE
GENERATOR
UV
DETECT
R
PULSE
FILTER
R
S
Q
HO
VS
DT
+5V
DEADTIME
UV
DETECT
VCC
LO
SD
VSS/COM
LEVEL
SHIFT
DELAY
COM
VSS
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