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IS61LV5128AL-10KI

Standard SRAM, 512KX8, 10ns, CMOS, PDSO36, 0.400 INCH, PLASTIC, MS-027, SOJ-36

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厂商名称:Integrated Silicon Solution ( ISSI )

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Integrated Silicon Solution ( ISSI )
零件包装代码
SOJ
包装说明
0.400 INCH, PLASTIC, MS-027, SOJ-36
针数
36
Reach Compliance Code
compliant
ECCN代码
3A991.B.2.A
最长访问时间
10 ns
I/O 类型
COMMON
JESD-30 代码
R-PDSO-J36
JESD-609代码
e0
长度
23.495 mm
内存密度
4194304 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
湿度敏感等级
3
功能数量
1
端子数量
36
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
512KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
SOJ
封装等效代码
SOJ36,.44
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
3.3 V
认证状态
Not Qualified
座面最大高度
3.75 mm
最大待机电流
0.02 A
最小待机电流
3.14 V
最大压摆率
0.095 mA
最大供电电压 (Vsup)
3.63 V
最小供电电压 (Vsup)
3.135 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
J BEND
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
10.16 mm
Base Number Matches
1
文档预览
IS61LV5128AL
512K x 8 HIGH-SPEED CMOS STATIC RAM
ISSI
APRIL 2005
®
FEATURES
• High-speed access times:
10, 12 ns
• High-performance, low-power CMOS process
• Multiple center power and ground pins for
greater noise immunity
• Easy memory expansion with
CE
and
OE
options
CE
power-down
• Fully static operation: no clock or refresh
required
• TTL compatible inputs and outputs
• Single 3.3V power supply
• Packages available:
– 36-pin 400-mil SOJ
– 36-pin miniBGA
– 44-pin TSOP (Type II)
• Lead-free available
DESCRIPTION
The
ISSI
IS61LV5128AL is a very high-speed, low power,
524,288-word by 8-bit CMOS static RAM. The
IS61LV5128AL is fabricated using
ISSI
's high-perform-
ance CMOS technology. This highly reliable process
coupled with innovative circuit design techniques, yields
higher performance and low power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down to 250 µW (typical) with CMOS input levels.
The IS61LV5128AL operates from a single 3.3V power
supply and all inputs are TTL-compatible.
The IS61LV5128AL is available in 36-pin 400-mil SOJ, 36-
pin mini BGA, and 44-pin TSOP (Type II) packages.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K X 8
MEMORY ARRAY
V
DD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CE
OE
WE
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
CONTROL
CIRCUIT
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
1
IS61LV5128AL
PIN CONFIGURATION
36 mini BGA
44-Pin TSOP (Type II)
ISSI
3
4
5
6
®
1
2
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
V
DD
I/O6
I/O7
A9
A1
A2
NC
WE
NC
A3
A4
A5
A6
A7
A8
I/O0
I/O1
V
DD
GND
A18
OE
A10
CE
A11
A17
A16
A12
A15
A13
I/O2
I/O3
A14
NC
NC
A0
A1
A2
A3
A4
CE
I/O0
I/O1
V
DD
GND
I/O2
I/O3
WE
A5
A6
A7
A8
A9
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
NC
A18
A17
A16
A15
OE
I/O7
I/O6
GND
V
DD
I/O5
I/O4
A14
A13
A12
A11
A10
NC
NC
NC
PIN DESCRIPTIONS
A0-A18
CE
OE
WE
I/O0-I/O7
V
DD
GND
NC
Address Inputs
Chip Enable Input
Output Enable Input
Write Enable Input
Bidirectional Ports
Power
Ground
No Connection
36-Pin SOJ
A0
A1
A2
A3
A4
CE
I/O0
I/O1
V
DD
GND
I/O2
I/O3
WE
A5
A6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE
I/O7
I/O6
GND
V
DD
I/O5
I/O4
A14
A13
A12
A11
A10
NC
TRUTH TABLE
Mode
WE
X
H
H
L
CE
H
L
L
L
OE
X
H
L
X
I/O Operation
High-Z
High-Z
D
OUT
D
IN
V
DD
Current
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
Not Selected
(Power-down)
Output Disabled
Read
Write
A7
A8
A9
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
IS61LV5128AL
ISSI
Value
–0.5 to V
DD
+ 0.5
–65 to +150
1.0
Unit
V
°C
W
®
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
OPERATING RANGE
V
DD
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
-40°C to +85°C
10ns
3.3V +10%, -5%
3.3V +10%, -5%
12ns
3.3V +10%
3.3V +10%
CAPACITANCE
(1,2)
Symbol
C
IN
C
I/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C, f = 1 MHz, V
DD
= 3.3V.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
3
IS61LV5128AL
ISSI
Test Conditions
V
DD
= Min., I
OH
= –4.0 mA
V
DD
= Min., I
OL
= 8.0 mA
Min.
2.4
2.0
–0.3
GND
V
IN
V
DD
GND
V
OUT
V
DD
, Outputs Disabled
Com.
Ind.
Com.
Ind.
–2
–5
–2
–5
Max.
0.4
V
DD
+ 0.3
0.8
2
5
2
5
Unit
V
V
V
V
µA
µA
®
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol Parameter
V
OH
V
OL
V
IH
V
IL
I
LI
I
LO
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Note:
1. V
IL
= –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol Parameter
I
CC
I
SB
V
DD
Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
DD
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CE
V
IH
, f = f
MAX
.
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CE
V
IH
, f = 0
Com.
Ind.
Com.
Ind.
-10
Min. Max.
90
95
40
45
20
25
15
20
-12
Min. Max.
85
90
35
40
20
25
15
20
Unit
mA
mA
I
SB
1
mA
I
SB
2
V
DD
= Max.,
Com.
CE
V
DD
– 0.2V,
Ind.
V
IN
V
DD
– 0.2V, or
V
IN
0.2V, f = 0
mA
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
IS61LV5128AL
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
Power Up Time
Power Down Time
-10
Min. Max.
10
2
0
0
3
0
10
10
4
4
4
10
-12
Min. Max.
12
2
0
0
3
0
12
12
5
5
6
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
®
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2
t
LZCE
(2)
t
PU
t
PD
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
levels of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
319
3.3V
3.3V
319
OUTPUT
30 pF
Including
jig and
scope
353
OUTPUT
5 pF
Including
jig and
scope
353
Figure 1
Figure 2
5
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
04/15/05
查看更多>
参数对比
与IS61LV5128AL-10KI相近的元器件有:IS61LV5128AL-10TLI、IS61LV5128AL-12T。描述及对比如下:
型号 IS61LV5128AL-10KI IS61LV5128AL-10TLI IS61LV5128AL-12T
描述 Standard SRAM, 512KX8, 10ns, CMOS, PDSO36, 0.400 INCH, PLASTIC, MS-027, SOJ-36 Standard SRAM, 512KX8, 10ns, CMOS, PDSO44, LEAD FREE, PLASTIC, TSOP2-44 512KX8 STANDARD SRAM, 12ns, PDSO44, PLASTIC, TSOP2-44
是否无铅 含铅 不含铅 含铅
是否Rohs认证 不符合 符合 不符合
厂商名称 Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
零件包装代码 SOJ TSOP2 TSOP2
包装说明 0.400 INCH, PLASTIC, MS-027, SOJ-36 LEAD FREE, PLASTIC, TSOP2-44 PLASTIC, TSOP2-44
针数 36 44 44
Reach Compliance Code compliant compliant compliant
ECCN代码 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
最长访问时间 10 ns 10 ns 12 ns
I/O 类型 COMMON COMMON COMMON
JESD-30 代码 R-PDSO-J36 R-PDSO-G44 R-PDSO-G44
JESD-609代码 e0 e3 e0
长度 23.495 mm 18.415 mm 18.415 mm
内存密度 4194304 bit 4194304 bit 4194304 bit
内存集成电路类型 STANDARD SRAM STANDARD SRAM STANDARD SRAM
内存宽度 8 8 8
功能数量 1 1 1
端子数量 36 44 44
字数 524288 words 524288 words 524288 words
字数代码 512000 512000 512000
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 85 °C 85 °C 70 °C
最低工作温度 -40 °C -40 °C -
组织 512KX8 512KX8 512KX8
输出特性 3-STATE 3-STATE 3-STATE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOJ TSOP2 TSOP2
封装等效代码 SOJ36,.44 TSOP44,.46,32 TSOP44,.46,32
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
并行/串行 PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) NOT SPECIFIED 260 NOT SPECIFIED
电源 3.3 V 3.3 V 3.3 V
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 3.75 mm 1.2 mm 1.2 mm
最大待机电流 0.02 A 0.02 A 0.015 A
最小待机电流 3.14 V 3.14 V 3.14 V
最大压摆率 0.095 mA 0.095 mA 0.085 mA
最大供电电压 (Vsup) 3.63 V 3.63 V 3.63 V
最小供电电压 (Vsup) 3.135 V 3.135 V 2.97 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES
技术 CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL COMMERCIAL
端子面层 Tin/Lead (Sn/Pb) Matte Tin (Sn) - annealed Tin/Lead (Sn/Pb)
端子形式 J BEND GULL WING GULL WING
端子节距 1.27 mm 0.8 mm 0.8 mm
端子位置 DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED 40 NOT SPECIFIED
宽度 10.16 mm 10.16 mm 10.16 mm
Base Number Matches 1 1 1
湿度敏感等级 3 3 -
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