ISSI
TARGET SPECIFICATION
IS62Ux25616 Series
256K x 16 LOW VOLTAGE, LOW POWER
CMOS STATIC RAM
FEATURES
• Voltage range options
-- 1.6V to 2.0V: IS62UT25616
-- 1.8V to 2.2V: IS62US25616
-- 2.3V to 2.7V: IS62UR25616
-- 2.7V to 3.3V: IS62UP25616
• Battery backup (SL/LL version)
-- 1.0V (min.) data retention
• Access times: 55, 70, and 100 ns
• Fully static operation and tri-state outputs
• Industrial temperature available
• Available in 48-ball mini BGA and
44-pin sTSOP (Type II)
®
ADVANCE INFORMATION
MAY 1999
DESCRIPTION
The
ISSI
IS62Ux25616 series is a low voltage, 262,144
words by 16 bits, CMOS SRAM. It is fabricated using
ISSI
's low voltage, six transistor (6T), CMOS technology.
The series is targeted to satisfy the demands of the state-
of-the-art technologies such as cell phones and pagers.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels. Additionally, easy
memory expansion is provided by using Chip Enable and
Output Enable inputs,
CE
and
OE
. The active LOW Write
Enable (
WE
) controls both writing and reading of the
memory. A data byte allows Upper Byte (
UB
) and Lower
Byte (
LB
) access.
The IS62Ux25616 series is packaged in the 48-ball mini
BGA and the 44-pin sTSOP (Type II).
PRODUCT SERIES OVERVIEW
Part No.
IS62UP25616
IS62UP25616
(1)
IS62UR25616
IS62UR25616
(1)
IS62US25616
IS62US25616
(1)
IS62UT25616
IS62UT25616
(1)
Voltage (V)
3.0,
±0.3
3.0,
±0.3
2.5,
±0.2
2.5,
±0.2
2.0,
±0.2
2.0,
±0.2
1.8,
±0.2
1.8,
±0.2
Speeds (ns)
55, 70, 100
55, 70, 100
55, 70, 100
55, 70, 100
55, 70, 100
55, 70, 100
55, 70, 100
55, 70, 100
Active I
CC
(mA)
25 @ 70 ns
25 @ 70 ns
15 @ 70 ns
15 @ 70 ns
10 @ 70 ns
10 @ 70 ns
10 @ 70 ns
10 @ 70 ns
Standby Current (
µ
A)
LL
SL
10
10
10
10
10
10
10
10
2
2
2
2
2
2
2
2
Temperature (
°
C)
0 to 70
40 to 85
0 to 70
40 to 85
0 to 70
40 to 85
0 to 70
40 to 85
Note:
1. Current value is max.
This document is a TARGET SPECIFICATION only. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible
product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
2231 Lawson Lane • Santa Clara, CA 95054-3311 • 1-800-379-4774 • Fax: (408) 588-0806
e-mail: sales@issiusa.com •
www.issiusa.com
Integrated Silicon Solution, Inc. — 1-800-379-4774
TARGET SPECIFICATION
SR070-0t
05/01/99
1
TARGET SPECIFICATION
IS62Ux25616 SERIES
ISSI
®
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VCC
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
TARGET SPECIFICATION
SR070-0T
05/01/99
TARGET SPECIFICATION
IS62Ux25616 SERIES
PIN CONFIGURATIONS
48-ball mini BGA (B)
1
2
3
4
5
6
A4
A3
A2
A1
A0
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
ISSI
44-pin sTSOP (Type II): (H)
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A12
®
1
2
3
4
5
6
7
A
B
C
D
E
F
G
H
LB
I/O8
I/O9
GND
Vcc
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CE
I/O1
I/O3
I/O4
I/O5
WE
A11
N/C
I/O0
I/O2
Vcc
GND
I/O6
I/O7
NC
PIN DESCRIPTIONS
A0-A16
I/O0-I/O15
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
8
9
10
11
12
CE
OE
WE
LB
UB
NC
Vcc
GND
Integrated Silicon Solution, Inc. — 1-800-379-4774
TARGET SPECIFICATION
SR070-0T
05/01/99
3
TARGET SPECIFICATION
IS62Ux25616 SERIES
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
ISSI
CE
H
X
L
L
L
L
L
L
L
L
®
WE
X
X
H
X
H
H
H
L
L
L
OE
X
X
H
X
L
L
L
X
X
X
LB
X
H
X
H
L
H
L
L
H
L
UB
X
H
X
H
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
Vcc Current
I
SB
, I
SB
1
I
CC
, I
CC
1
I
CC
, I
CC
1
Write
I
CC
, I
CC
1
Notes:
1. H = V
IH
, L = V
IL
, X = Don't Care.
2.
UB
,
LB
(Upper, Lower Byte enable).
These active LOW inputs allow individual bytes to be written or read.
When
LB
is LOW, data is written or read to the lower byte, I/O0-I/O7.
When
UB
is LOW, data is written or read to the upper byte, I/O8-I/O15.
OPERATING RANGE
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
CC
V
TERM
T
STG
T
BIAS
P
T
Iout
Parameter
Power Supply Voltage Related to GND
Terminal Voltage with Respect to GND
Storage Temperature
Temperature Under Bias
Com.
Ind.
Power Dissipation
DC Output Current
Value
–0.5 to +4.0
–0.5 to Vcc + 0.5
–65 to +150
–10 to +85
–45 to +90
2.0
±20
Unit
V
V
°C
°C
°C
W
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated
in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
6
8
Unit
pF
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
TARGET SPECIFICATION
SR070-0T
05/01/99
TARGET SPECIFICATION
IS62Ux25616 SERIES
AC TEST CONDITIONS
(Over Operating Range)
Parameter
Input Pulse Level
(1)
IS62UP25616
IS62UR25616
IS62US25616
IS62UT25616
Unit
0.4V to 2.2V
0.4V to 2.2V
0.4V to 1.8V
0.4V to 1.6V
5 ns
1.5V
1.1V
0.9V
0.8V
CL
1
= 30 pF
+ 1TTL Load
CL
2
= 5 pF
ISSI
®
1
2
3
4
5
6
IS62UP25616
IS62UR25616
IS62US25616
IS62UT25616
Output Load (all test parameters except in Note 2)
(see Figure 1)
Output Load
(1)
(all High-Z and Low-Z parameters)
(see Figure 1)
Notes:
1. Including jig and scope capacitance.
2. V
TM
= 2.8V for Vcc = 3.0V
±
0.3V
V
TM
= 2.3V for Vcc = 2.5V
±
0.2V
V
TM
= 1.8V for Vcc = 2.0V
±
0.2V
V
TM
= 1.6V for Vcc = 1.8V
±
0.2V
Input Rise and Fall Times
Input and Output Timing
and Reference Level
AC TEST LOADS
3070
Ω
V
TM
7
8
3150
Ω
D
OUT
CL1,
CL2
9
Figure 1
10
11
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
TARGET SPECIFICATION
SR070-0T
05/01/99
5
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