DATASHEET
40V Radiation Hardened and SET Enhanced Precision
Low Power Operational Amplifier
ISL70219ASEH, ISL70419ASEH
The ISL70219ASEH and ISL70419ASEH are a family of very high
precision amplifiers featuring the perfect combination of low
noise vs power consumption. Low offset voltage, low I
BIAS
current
and low temperature drift making them the ideal choice for
applications requiring both high DC accuracy and AC
performance. The combination of high precision, low noise, low
power and small footprint provides the user with outstanding
value and flexibility relative to similar competitive parts.
Applications for these amplifiers include precision active
filters, medical and analytical instrumentation, precision
power supply controls and industrial controls.
The ISL70219ASEH is offered in a 10 lead hermetic ceramic
flatpack. The ISL70419ASEH is offered in a 14 lead hermetic
ceramic flatpack package. The devices are packaged in
industry standard pin configurations and operate across the
extended temperature range from -55°C to +125°C.
Features
• Electrically screened to DLA SMD#
5962-14226
• Low input offset voltage. . . . . . . . . . . . . . . . . . . .±110µV, max
• Superb offset temperature coefficient. . . . . . . . 1µV/°C, max
• Input bias current . . . . . . . . . . . . . . . . . . . . . . . . . .±15nA, max
• Input bias current TC . . . . . . . . . . . . . . . . . . . . ±5pA/°C, max
• Low current consumption . . . . . . . . . . . . . . . . . . . . . . . 440µA
• Voltage noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8nV/√Hz
• Wide supply range . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 36V
• Operating temperature range. . . . . . . . . . . .-55°C to +125°C
• Radiation environment
- SEB LET
TH
(V
S
= ±18V) . . . . . . . . . . . . . .86.4 MeV•cm
2
/mg
- SET recovery time . . . . . . . . . . .
≤10µs
at 60 MeV•cm
2
/m
- SEL immune (SOI process)
- Total dose HDR (50 to 300rad(Si)/s). . . . . . . . 300krad(Si)
- Total dose LDR (10mrad(Si)/s) . . . . . . . . . . . 100krad(Si) *
* Product capability established by initial characterization. The
EH version is acceptance tested on a wafer-by-wafer basis to
50krad(Si) at low dose rate.
Related Literature
•
UG007,
“ISL70219ASEH Evaluation Board User Guide”
•
TR002,
“Single Event Effects (SEE) Testing of the
ISL70219ASEH Dual Operational Amplifier”
• ISL70219ASEH SMD
5962-14226
• ISL70219ASEH Radiation Test Report
Applications
• Precision instrumentation
• Spectral analysis equipment
• Active filter blocks, thermocouples and RTD reference
buffers
• Data acquisition and power supply control
C
1
8.2nF
V
+
-
R
1
V
IN
1.84k
4.93k
3.3nF
C
2
V
-
R
2
ISL70X19ASEH
+
OUTPUT
SET DURATION (µs)
16
14
12
10
8
6
4
2
0
-8
-6
-4
-2
0
2
4
SET EXTREME DEVIATION (V)
FIGURE 1. TYPICAL APPLICATION: SALLEN-KEY LOW PASS FILTER
(F
C
= 10kHz)
October 27, 2014
FN8459.0
FIGURE 2. SET DEVIATION vs DURATION FOR LET = 60
MeV•cm
2
/mg (
V
S
=
±18V)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL70219ASEH, ISL70419ASEH
Pin Configurations
ISL70219ASEH
(10 LD FLATPACK)
TOP VIEW
OUT
A
-IN
A
+IN
A
NC
V
-
1
2
3
4
5
10
V
+
OUT
B
-IN
B
+IN
B
LID
ISL70419ASEH6
(14 LD FLATPACK)
TOP VIEW
OUT
A
-IN
A
+IN
A
V
+
+IN
B
-IN
B
OUT
B
1
2
3
4
5
6
7
- +
B
+ -
C
A
- +
D
+ -
14
13
12
11
10
9
8
OUT
D
-IN
D
+IN
D
V
-
+IN
C
-IN
C
OUT
C
-
+
A
9
B
+
-
8
7
6
Pin Descriptions
10 LD
PIN NUMBER
1
2
3
10
7
8
9
-
-
-
5
-
-
-
-
4
6
14 LD
PIN NUMBER
1
2
3
4
5
6
7
8
9
10
11
12
13
14
E-Pad
-
-
V
+
500Ω
IN-
500Ω
IN+
V
+
OUT
V
-
CIRCUIT 2
V
-
PIN NAME
OUT
A
-IN
A
+IN
A
V
+
+IN
B
-IN
B
OUT
B
OUT
C
-IN
C
+IN
C
V
-
+IN
D
-IN
D
OUT
D
E-Pad
NC
LID
EQUIVALENT ESD CIRCUIT
Circuit 2
Circuit 1
Circuit 1
Circuit 3
Circuit 1
Circuit 1
Circuit 2
Circuit 2
Circuit 1
Circuit 1
Circuit 3
Circuit 1
Circuit 1
Circuit 2
None
-
NA
Amplifier A output
DESCRIPTION
Amplifier A inverting input
Amplifier A noninverting input
Positive power supply
Amplifier B noninverting input
Amplifier B inverting input
Amplifier B output
Amplifier C output
Amplifier C inverting input
Amplifier C noninverting input
Negative power supply
Amplifier D noninverting input
Amplifier D inverting input
Amplifier D output
E-Pad under package (unbiased, tied to package lid)
No connect
Unbiased, tied to package lid
V
+
CAPACITIVELY
COUPLED
ESD CLAMP
CIRCUIT 3
V
-
CIRCUIT 1
Submit Document Feedback
2
FN8459.0
October 27, 2014
ISL70219ASEH, ISL70419ASEH
Ordering Information
ORDERING/SMD NUMBER
(Note
2)
5962F1422602VYC
5962F1422602V9A
ISL70219ASEHF/PROTO
ISL70219ASEHF/SAMPLE
5962F1422603VXC (Coming
Soon)
5962F1422603V9A (Coming
Soon)
ISL70419ASEHF/PROTO (Coming
Soon)
ISL70419ASEHF/SAMPLE (Coming
Soon)
ISL70219ASEHEV1Z
ISL70419ASEHEV1Z (Coming Soon)
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed in the
“Ordering Information” table must be used when ordering.
PART
NUMBER
(Note
1)
ISL70219ASEHVF
ISL70219ASEHVX
ISL70219ASEHF/PROTO
ISL70219ASEHVX/SAMPLE
ISL70419ASEHVF
ISL70419ASEHVX
ISL70419ASEHF/PROTO
ISL70419ASEHVX/SAMPLE
ISL70219ASEHEV1Z
ISL70419ASEHEV1Z
TEMP RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
Evaluation Board
Evaluation Board
PACKAGE
(RoHS Compliant)
10 Ld Flatpack
Die
10 Ld Flatpack
Die
14 Ld Flatpack
Die
14 Ld Flatpack
Die
K14.C
K14.C
K10.A
K10.A
PKG.
DWG. #
Submit Document Feedback
3
FN8459.0
October 27, 2014
ISL70219ASEH, ISL70419ASEH
Absolute Maximum Ratings
Maximum Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42V
Maximum Supply Voltage (Note
5).
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Maximum Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Maximum Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
Min/Max Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V
-
- 0.5V to V
+
+ 0.5V
Max/Min Input Current for Input Voltage >V
+
or <V
-
. . . . . . . . . . . . . . . ±20mA
Output Short-Circuit Duration (1 output at a time). . . . . . . . . . . . . . . . Indefinite
ESD Rating
Human Body Model (Tested per MIL-PRF-883 3015.7). . . . . . . . . . . 2kV
Machine Model (Tested per EIA/JESD22-A115-A) . . . . . . . . . . . . . . 200V
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . 750V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
10 Ld Flatpack Package (Notes
3, 4).
. . . .
40
8
14 Ld Flatpack Package (Notes
3, 4).
. . . .
35
8
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Recommended Operating Conditions
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
Single Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5V to 36.0V
Split Rail Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2.25V to ±18V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379
for details.
4. For
JC
, the “case temp” location is the center of the package underside.
5. Tested in a heavy ion environment at LET = 86.4MeV
•
cm
2
/mg at +125°C (T
C
) for SEB. Refer to
Single Event Effects Test Report
for more information.
V
S
= ±18.0V, V
CM
= V
O
= 0V, R
L
= Open, T
A
= +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C;
over
a total ionizing dose of 300krad(Si) with exposure at
a high dose rate of 50 to 300rad(Si)/s or over a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s, unless
otherwise noted
.
PARAMETER
V
OS
DESCRIPTION
Input Offset Voltage
TEST CONDITIONS
MIN
(Note
6)
-
-
TCV
OS
I
B
Offset Voltage Drift
Input Bias Current
(Note
7)
T
A
= +25°C
T
A
= -55°C, +125°C
T
A
= +25°C, post HDR/LDR Rad
TCI
B
I
OS
Input Bias Current Temperature
Coefficient
Input Offset Current
(Note
7)
T
A
= +25°C
T
A
= -55°C, +125°C
T
A
= +25°C, post HDR/LDR Rad
TCI
OS
V
CM
CMRR
Input Offset Current Temperature
Coefficient
Input Voltage Range
Common-Mode Rejection Ratio
(Note
7)
Guaranteed by CMRR test
V
CM
= -16V to +16V
V
S
= ±2.25V to ±20V
V
O
= -16V to +16V, R
L
= 10kΩ to
ground
R
L
= 10kΩ to ground
R
L
= 2kΩ to ground
-
-2.5
-5
-15
-5
-2.5
-3
-10
-3
-16
120
120
PSRR
Power Supply Rejection Ratio
120
120
A
VOL
V
OH
Open-loop Gain
Output Voltage High
3,000
16.5
16.2
16.3
16.0
TYP
10
-
0.1
0.08
-
-
1
0.08
-
-
0.42
-
145
-
145
-
14,000
16.7
-
16.5
-
MAX
(Note
6)
85
110
1
2.5
5
15
5
2.5
3
10
3
16
-
-
-
-
-
-
-
-
-
UNITS
µV
µV
µV/
°
C
nA
nA
nA
pA/°C
nA
nA
nA
pA/°C
V
dB
dB
dB
dB
V/mV
V
V
V
V
Electrical Specifications
Submit Document Feedback
4
FN8459.0
October 27, 2014
ISL70219ASEH, ISL70419ASEH
V
S
= ±18.0V, V
CM
= V
O
= 0V, R
L
= Open, T
A
= +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C;
over
a total ionizing dose of 300krad(Si) with exposure at
a high dose rate of 50 to 300rad(Si)/s or over a total ionizing dose of 50krad(Si) with exposure at a low dose rate of <10mrad(Si)/s, unless
otherwise noted
. (Continued)
PARAMETER
V
OL
DESCRIPTION
Output Voltage Low
TEST CONDITIONS
R
L
= 10kΩ to ground
R
L
= 2kΩ to ground
I
S
I
SC
Supply Current/Amplifier
MIN
(Note
6)
-
-
-
-
-
-
Output Short-circuit Current
Sourcing: V
IN
= 0V, V
OUT
= -16V
(Note
7)
Sinking: V
IN
= 0V, V
OUT
= +16V
(Note
7)
V
SUPPLY
GBWP
e
nVp-p
e
n
e
n
e
n
e
n
i
n
SR
Supply Voltage Range
Guaranteed by PSRR
-
-
±2.25
TYP
-16.7
-
-16.5
-
0.49
-
41
-42
-
±20
MAX
(Note
6)
-16.5
-16.2
-16.3
-16.0
0.725
0.85
-
UNITS
V
V
V
V
mA
mA
mA
mA
V
Electrical Specifications
AC SPECIFICATIONS
Gain Bandwidth Product
Voltage Noise V
P-P
Voltage Noise Density
Voltage Noise Density
Voltage Noise Density
Voltage Noise Density
Current Noise Density
A
V
= 1k, R
L
= 2kΩ (Note
7)
0.1Hz to 10Hz (Note
7)
f = 10Hz (Note
7)
f = 100Hz (Note
7)
f = 1kHz (Note
7)
f = 10kHz (Note
7)
f = 1kHz (Note
7)
-
-
-
-
-
-
-
1.5
0.25
10
8.2
8
8
0.1
-
-
-
-
-
-
-
MHz
µV
P-P
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
TRANSIENT RESPONSE
Slew Rate, V
OUT
20% to 80%
Rise Time
10% to 90% of V
OUT
Fall Time
90% to 10% of V
OUT
t
s
Settling Time to 0.1%
10V Step; 10% to V
OUT
Settling Time to 0.01%
10V Step; 10% to V
OUT
Settling Time to 0.1%
4V Step; 10% to V
OUT
Settling Time to 0.01%
4V Step; 10% to V
OUT
t
OL
Output Positive Overload Recovery
Time
Output Negative Overload Recovery
Time
OS+
Positive Overshoot
A
V
= 1, R
L
= 2kΩV
O
= 4V
P-P
A
V
= 1, V
OUT
= 50mV
P-P
,
R
L
= 10kΩto V
CM
A
V
= 1, V
OUT
= 50mV
P-P
, R
L
= 10kΩto
V
CM
A
V
= -1, V
OUT
= 10V
P-P
, R
L
= 5kΩto
V
CM
(Note
7)
A
V
= -1, V
OUT
= 10V
P-P
, R
L
= 5kΩto
V
CM
(Note
7)
A
V
= -1, V
OUT
= 4V
P-P
, R
L
= 5kΩto V
CM
(Note
7)
A
V
= -1, V
OUT
= 4V
P-P
, R
L
= 5kΩto V
CM
(Note
7)
A
V
= -100, V
IN
= 0.2V
P-P,
R
L
= 2kΩto
V
CM
(Note
7)
A
V
= -100, V
IN
= 0.2V
P-P,
R
L
= 2kΩto
V
CM
(Note
7)
A
V
= 1, V
OUT
= 10V
P-P
, R
f
= 0Ω
R
L
= 2kΩto V
CM
A
V
= 1, V
OUT
= 10V
P-P
, R
f
= 0Ω
R
L
= 2kΩto V
CM
0.3
0.2
t
r
, t
f
,
Small Signal
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5
-
130
-
130
-
21
24
13
18
5.6
10.6
15
-
15
-
-
-
450
625
600
700
-
-
-
-
-
-
-
33
-
33
V/µs
V/µs
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
%
%
%
%
OS-
Negative Overshoot
Submit Document Feedback
5
FN8459.0
October 27, 2014