Intel
®
82599 10 Gigabit Ethernet
Controller
Specification Update
Networking Division (ND)
January 2014
Revision 3.0
Intel
®
82599 10 GbE Controller—Revision History
Revision History
Date
Revision
Description
•
•
•
•
Supports datasheet. Initial public release.
Supports datasheet. Updated with additional testing results.
Removed fixed Errata #9, #10, #23.
Added Errata #25 through #38.
9/2008
11/2008
3/2009
5/2009
1
0.5
0.6
0.75
1.9
1. Revision number changes to 1.9 at product release. No other versions have been released between revisions 0.75 and 1.9.
Date
Revision
Description
•
•
•
•
Initial Public Release.
Added Specification Clarification #2.
Added Erratum #36.
Updated Erratum#13.
Added Specification Clarification #4.
Added device ID for CX4 and combined backplane.
Added Erratum #37.
Added Erratum #38, #39, and #40.
Added Specification Change #1.
Added Errata #34, #45, and #56.
Added Errata #41,#42,#43, and #44.
Added Specification Clarification #67.
Added Software Clarification #1.
Added Errata #45 and #46.
Added Specification Change #2.
Added Specification Clarification #7 and #8.
Added Errata #47, #48, #49, and #50.
Added Software Clarification #2.
Revised Specification Change #2.
Added Specification Change #3.
7/2009
10/2009
2.0
2.1
1/2010
2.2
•
•
•
3/2011
9/2010
2.3
2.4
•
•
•
•
10/2010
2.5
•
•
1/2011
2.6
•
•
•
3/2011
2.7
•
•
•
•
2
Revision History—Intel
®
82599 10 GbE Controller
Date
Revision
Description
Specification Clarifications added or updated:
•
•
•
•
•
•
•
6. AN 1G TIMEOUT Only Works When the Link Partner Is Idle
(Text in description
corrected.)
8. PCIe Timeout Interrupt
(Added)
9. Master Disable Flow
(Added)
48. FCoE: Exhausted Receive Context Is not Invalidated if Last Buffer Size Is Equal to
User Buffer Size
(Updated Windows* driver information in workaround.)
50. LED Does not Blink in Invert Mode
(Added)
51. LEDs Cannot Be Configured to Blink in LED_ON Mode
(Added)
3. Serial Interfaces Programmed by Bit Banging
8/15/2011
2.81
Errata added or updated:
Software Clarifications added or updated:
9/14/2011
2.82
Device Information added:
•
JL82599EN (Single Port; SFI Only). Port 1 disabled. See device information tables; for
example -
Table 1-1.
5. Flow Director Statistics Inaccuracy
(Problem statement updated for clarity.)
52. NC-SI: Get NC-SI Pass-Through Statistics Response Format
(Added)
Errata added or updated:
•
•
10/28/2011
2.83
Device Information updated:
•
Table 1-1:
S-Specification names were incorrect. These have been corrected.
12/7/2011
2.84
Specification Clarifications added or updated:
•
5. SFP+ (SFI) Connection Clarification
(Note updated. Reference made to workaround
available under NDA.)
2/03/2012
2.85
Specification Clarifications added or updated:
10. Padding on Transmitted SCTP Packets.Errata
added or updated:
•
37. PCIe: PM_Active_State_NAK Message Might Be Ignored
(New internal-only text
added to the second workaround bullet: “In this case, if 82599 is connected to a x1 or x2
Lane PCIe Link, it might send a PM_Active_State_Request_L1 DLLP with bad CRC and a
Correctable Error will be reported by Upstream Device. See https://vthsd.iil.intel.com/
hsd/hadar/bug_de/default.aspx?bug_de_id=2610409.”)
•
4/24/2012
2.86
Specification Clarifications added or updated:
•
•
•
•
•
•
11. 82599EN EEPROM Image File
(Added)
4. Bit 16 of CTRL_EXT Register Must Be Set
(Added)
53. Flow Director Filters Configuration Issue
(Added)
54. PF's MSI TLP Might Contain the Wrong Requester ID When a VF Uses MSI-X
(Added)
4. Identify Network Adapter Port by Blinking LED
(Added)
5. PF/VF Drivers Should Configure Registers That Are not Reset by VFLR
(Added)
Specification Changes added or updated:
Errata added or updated:
Software Clarifications added or updated:
3
Intel
®
82599 10 GbE Controller—Revision History
Date
Revision
Description
Specification Clarifications added or updated:
•
2. PCIe Completion Timeout Value Must Be Properly Set
(Last two paragraphs updated for
clarity.)
5. MAC Link Setup and Auto Negotiation
(Added)
55. XAUI Interface Might not Be Able to Link After a Specific Reset Sequence
(Added)
56. ETS Resolution
(Added)
57. Flow Control and Missed Packets Counters Limitation
(Added)
9/5/2012
2.87
Specification Changes added or updated:
•
•
•
•
Errata added or updated:
6/21/13
2.9
Specification Clarifications added or updated:
•
•
•
•
•
•
•
•
•
•
12. Selecting a RX Pool Using VLAN Filters
(Added)
13. 82599 SFP+ Receiver Specification Conforms to SFF-8431
(Added)
14. SR-IOV and Jumbo Frames Support in 82599
(Added)
1. PBA Number Module — Word Address 0x15-0x16
2. Updates to PXE/iSCSI EEPROM Words (B0 Stepping)
4. Bit 16 of CTRL_EXT Register Must Be Set
6. RXMTRL.UDPT Initial Value
(Added)
7. Flow Director Registers Update
(Added)
8. EEPROM Device Size
(Added)
9. The Flow Director FDIRErr(0) Bit in the Rx Descriptor Is Valid Only if the FLM Bit Is Set
(Added)
5. Flow Director Statistics Inaccuracy
33. The EEPROM Core Clocks Gate Disable Setting Impacts Link Status During D3 State
47. PCIe: N_FTS Value Is too Small When Common Clock Configuration Is Zero
58. 82599 LAN Port #1 SFI Link Instability
(Added)
59. NC-SI: Get NC-SI Pass-through Statistics Response Might Contain Incorrect Packet
Counts
(Added)
60. IPv4 Checksum Error Might Be Reported for Multicast Frames Over 12 KB
(Added)
61. RXMEMWRAP Register Content Is Inaccurate
(Added)
62. Flow Director: Collision Indication Can Be Cleared by Adding a New Filter
(Added)
Specification Changes added or updated:
Errata added or updated:
•
•
•
•
•
•
•
•
1/8/14
3.0
Specification Clarifications added or updated:
•
•
•
15. VLAN Anti-spoof Filter of an Untagged Packet
(Added)
16. SR-IOV Prefetchable Address Space
(Added)
63. Clearing RXEN During VM-to-VM Loopback Traffic Might Cause Rx Hang
(Added)
Errata added or updated:
4
Legal—Intel
®
82599 10 GbE Controller
Legal
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