1. In case of 40MHz Frequency, CL1 can be supported.
Address configuration
Organization
32M x 16
Bank
BA0, BA1
Row
A0 - A12
Column Address
A0 - A9
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VIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
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2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could
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visions may apply.
February 2006
K4M51163PC - R(B)E/G/C/F
FUNCTIONAL BLOCK DIAGRAM
Mobile SDRAM
I/O Control
LWE
Data Input Register
Bank Select
LDQM
8M x 16
Sense AMP
8M x 16
8M x 16
8M x 16
Refresh Counter
Output Buffer
Row Decoder
Row Buffer
DQi
Address Register
LRAS
CLK
CKE
CLK
ADD
Column Decoder
Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
CS
RAS
CAS
WE
L(U)DQM
February 2006
K4M51163PC - R(B)E/G/C/F
Package Dimension and Pin Configuration
< Bottom View
*1
>
E
1
9
A
B
C
D
1
D
D
E
F
G
H
J
E
e
A
B
C
D
E
F
G
H
J
8
7
6
5
4
3
2
1
1
VSS
DQ14
DQ12
DQ10
DQ8
UDQM
A12
A8
VSS
Mobile SDRAM
< Top View
*2
>
54Ball(6x9) FBGA
2
DQ15
DQ13
DQ11
DQ9
NC
CLK
A11
A7
A5
3
VSSQ
VDDQ
VSSQ
VDDQ
VSS
CKE
A9
A6
A4
7
VDDQ
VSSQ
VDDQ
VSSQ
VDD
CAS
BA0
A0
A3
8
DQ0
DQ2
DQ4
DQ6
LDQM
RAS
BA1
A1
A2
9
VDD
DQ1
DQ3
DQ5
DQ7
WE
CS
A10
VDD
Pin Name
Pin Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
[Unit:mm]
*2: Top View
CLK
CS
CKE
A
0
~ A
12
A
A1
b
BA
0
~ BA
1
RAS
CAS
WE
L(U)DQM
z
*1: Bottom View
< Top View
*2
>
#A1 Ball Origin Indicator
DQ
0
~
15
V
DD
/V
SS
V
DDQ
/V
SSQ
SEC
Week
XXXX
K4M51163PC
Symbol
A
A
1
E
E
1
D
D
1
e
b
z
Min
-
0.25
11.4
-
9.9
-
-
0.45
-
Typ
-
-
11.5
6.40
10.0
6.40
0.80
0.50
-
Max
1.00
-
11.6
-
10.1
-
-
0.55
0.10
February 2006
K4M51163PC - R(B)E/G/C/F
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to V
ss
Voltage on V
DD
supply relative to V
ss
Storage temperature
Power dissipation
Short circuit current
Symbol
V
IN
, V
OUT
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 2.6
-1.0 ~ 2.6
-55 ~ +150
1.0
50
Mobile SDRAM
Unit
V
V
°C
W
mA
NOTES:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= -25°C ~ 85°C for Extended, -25°C ~ 70°C for Commercial)
Parameter
Supply voltage
V
DDQ
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
V
IH
V
IL
V
OH
V
OL
I
LI
1.7
0.8 x V
DDQ
-0.3
V
DDQ
-0.2
-
-2
1.8
1.8
0
-
-
-
1.95
V
DDQ
+ 0.3
0.3
-
0.2
2
V
V
V
V
V
uA
1
2
3
I
OH
= -0.1mA
I
OL
= 0.1mA
4
Symbol
V
DD
Min
1.7
Typ
1.8
Max
1.95
Unit
V
Note
1
NOTES :
1. Under all conditions, VDDQ must be less than or equal to VDD.
2. VIH (max) = 2.2V AC.The overshoot voltage duration is
≤
3ns.
3. VIL (min) = -1.0V AC. The undershoot voltage duration is
≤
3ns.
4. Any input 0V
≤
VIN
≤
VDDQ.
Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs.
5. Dout is disabled, 0V
≤
VOUT
≤
VDDQ.
CAPACITANCE
(V
DD
= 1.8V, T
A
= 23°C, f = 1MHz, V
REF
=0.9V
±
50 mV)
Pin
Clock
RAS, CAS, WE, CS, CKE, DQM
Address
DQ
0
~ DQ
15
Symbol
C
CLK
C
IN
C
ADD
C
OUT
Min
1.5
1.5
1.5
3.0
Max
3.0
3.0
3.0
5.0
Unit
pF
pF
pF
pF
Note
February 2006
K4M51163PC - R(B)E/G/C/F
DC CHARACTERISTICS
Mobile SDRAM
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= -25°C ~ 85°C for Extended, -25°C ~ 70°C for Commercial)
Version
Parameter
Symbol
Test Condition
-75
Operating Current
(One Bank Active)
Precharge Standby Current in
power-down mode
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
-90
-1L
Unit
Note
I
CC1
90
90
90
mA
1
I
CC2
P
0.3
mA
0.3
10
mA
1
6
mA
3
25
mA
I
CC2
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
Precharge Standby Current
in non power-down mode
I
CC2
NS
Active Standby Current
in power-down mode
I
CC3
P
I
CC3
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
t
ARFC
≥
t
ARFC
(min)
TCSR
Full Array
-E/C
1/2 of Full
1/4 of Full
Full Array
-G/F
1/2 of Full
1/4 of Full
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3
NS
15
mA
Operating Current
(Burst Mode)
I
CC
4
95
80
80
mA
1
Refresh Current
I
CC
5
150
45
*3
300
270
255
250
220
205
150
150
85/70
600
500
450
mA
°C
2
4
uA
Self Refresh Current
I
CC
6
CKE
≤
0.2V
500
400
350
10
uA
6
5
Deep Power Down Current
I
CC
8
CKE
≤
0.2V
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. It has +/-5
°C
tolerance.
4. K4M51163PC-R(B)E/C**
5. K4M51163PC-R(B)G/F**
6. DPD(Deep Power Down) function is an optional feature, and it will be enabled upon request.
Please contact Samsung for more information.
7. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
