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LD49150

1.5A Very low drop for low output voltage regulator

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

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LD49150
1.5 A ultra low-dropout voltage regulator
Datasheet
-
production data
Applications
Graphics processors
PC add-in cards
Microprocessor core voltage supply
Low voltage digital ICs
PPAK
DFN6 (3x3 mm)
High efficiency linear power supplies
SMPS post regulators
Features
Input voltage range:
– V
I
= 1.4 V to 5.5 V
– V
BIAS
= 3 V to 6 V
Stable with ceramic capacitors
±1.5% initial tolerance
Maximum dropout voltage (V
I
- V
O
) 200 mV
over the operating temperature range
Adjustable output voltage starting from 0.8 V
Fast transient response (up to 10 MHz
bandwidth)
Excellent line and load regulation
specifications
Logic-controlled shutdown option
Thermal shutdown and current limit protection
Description
The LD49150 is a high-bandwidth, low-dropout,
1.5 A voltage regulator, ideal for powering core
voltages of low power microprocessors. The
LD49150 implements a dual supply configuration,
which guarantees a very low output impedance
and a very fast transient response. The LD49150
requires a bias input supply and a main input
supply, allowing ultra-low input voltages on the
main supply rail. The input supply operates from
1.4 V to 5.5 V and the bias supply requires
between 3 V and 6 V to work properly. The
LD49150 offers fixed output voltages from 0.8 V to
1.8 V and adjustable output voltages starting from
0.8 V. The LD49150 requires a minimum output
capacitance for stability, and works optimally with
small ceramic capacitors.
Junction temperature range: - 25 °C to 125 °C
Table 1. Device summary
Order codes
PPAK (tape and reel)
LD49150PT08R
LD49150PT10R
LD49150PT12R
1. Available on request.
DFN6 (tape and reel)
(1)
Output voltages
Adjustable from 0.8 V
LD49150PU10R
LD49150PU12R
1.0 V
1.2 V
May 2014
This is information on a product in full production.
DocID13446 Rev 4
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www.st.com
Contents
LD49150
Contents
1
2
3
4
5
6
7
8
Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Alternative application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
Input supply voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Bias supply voltage (VBIAS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
External capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Minimum load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Power sequencing recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Power dissipation/heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
PPAK package heatsinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Adjustable regulator design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9
10
11
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24
DocID13446 Rev 4
LD49150
Typical application circuits
1
Typical application circuits
Figure 1. Adjustable version
Figure 2. Fixed version with enable
DocID13446 Rev 4
3/24
24
Alternative application circuits
LD49150
2
Alternative application circuits
Figure 3. Single supply voltage solution
Figure 4. LD49150 and DC-DC pre-regulator to reduce power dissipation
4/24
DocID13446 Rev 4
LD49150
Pin configuration
3
Pin configuration
Figure 5. Pin connections (PPAK top view, DFN bottom view)
DFN6 (3x3 mm)
PPAK
Table 2. Pin description
PPAK pin
1
2
3
4
5
DFN pin
2
ADJ
3
1
4
6
5
V
IN
GND
V
OUT
V
BIAS
N.C.
Adjustable regulator feedback input connected to resistor voltage divider
Input of the voltage regulator
Ground (tab is connected to ground)
Regulator output
Input bias voltage powers circuitry on the regulator with the exception of the
output power device
Not connected
Symbol
EN
Note
Enable (input): logic high = enable, logic low = shutdown
DocID13446 Rev 4
5/24
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