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LDL112PU18R

LDO Regulator Pos 1.8V 1.2A 6-Pin DFN EP T/R

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

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器件参数
参数名称
属性值
欧盟限制某些有害物质的使用
Compliant
ECCN (US)
EAR99
Part Status
Active
HTS
8542.39.00.01
类型
Type
LDO
Number of Outputs
1
Polarity
Positive
Accuracy (%)
±2
输出类型
Output Type
Fixed
Output Voltage (V)
1.8
Maximum Output Current (A)
1.2
Minimum Input Voltage (V)
1.6
Maximum Input Voltage (V)
5.5
Maximum Dropout Voltage @ Current (V)
0.6@1.2A
Line Regulation
0.01%/V
Load Regulation
30mA
Maximum Quiescent Current (mA)
0.07
Junction to Ambient
65°C/W
Junction to Case
15°C/W
Special Features
Thermal Shutdown Protection|Current Limit
Minimum Operating Temperature (°C)
-40
Maximum Operating Temperature (°C)
125
系列
Packaging
Tape and Reel
Supplier Package
DFN EP
Pin Count
6
Standard Package Name
DFN
Mounting
Surface Mount
Package Height
0.73
Package Length
2
Package Width
2
PCB changed
6
Lead Shape
No Lead
参考设计
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文档预览
LDL112
Datasheet
1.2 A low quiescent current LDO with reverse current protection
Features
Input voltage from 1.6 to 5.5 V
Very low-dropout voltage (300 mV typ. at 1 A load)
Low quiescent current (35 µA typ. at no-load, 1 µA max. in off mode)
Output voltage tolerance: ± 2.0% at 25 °C
1.2 A guaranteed output current
Wide range of output voltages available on request: 0.8 V to 5 V with 50 mV
step and adjustable
Logic-controlled electronic shutdown
Compatible with ceramic capacitor C
OUT
= 1 µF
Internal current and thermal limit
Available in DFN6 (2x2), DFN6 (3x3) mm, SO8-batwing and PPAK packages
Temperature range: -40 °C to 125 °C
Reverse current protection
Output discharge function (optional)
Applications
Consumer
Computer
Battery-powered systems
Low voltage point-of-load
USB-powered devices
Maturity status link
LDL112
Description
The
LDL112
is a low-dropout linear regulator, which can provide a maximum current
of 1.2 A, with a typical dropout voltage of 300 mV.
It is stabilized with a ceramic capacitor on the output.
The very low drop voltage, low quiescent current and reverse current protection
features make it suitable for low power battery-powered applications.
The enable logic control function puts the
LDL112
in shutdown mode allowing a total
current consumption lower than 1 µA.
The device is equipped with current limit and thermal protection.
DS10321
-
Rev 3
-
February 2019
For further information contact your local STMicroelectronics sales office.
www.st.com
LDL112
Diagram
1
Diagram
Figure 2.
Block diagram
V
IN
V
IN
Thermal
protection
Bandgap
reference
800mV
OPAMP
Current limit
Bandgap
reference
Thermal
protection
Current limit
Reverse
current
protection
800mV
OPAMP
PMOS
Reverse
current
protection
V
FB
V
FB
PMOS
V
OUT
V
OUT
*
EN
Internal
enable
Enable
*
EN
Internal
enable
Enable
ADJ
GND
GND
Fixed version
Adjustable version
AM14036V1
Note:
(*) The output discharge function is optional.
DS10321
-
Rev 3
page 2/32
LDL112
Pin configuration
2
Pin configuration
Figure 3.
Pin connection DFN6 (3x3) and DFN6 (2x2) (top view)
Figure 4.
Pin connection PPAK and SO8 (top view)
Table 1.
Pin description
Symbol
V
IN
GND
EN
ADJ
V
OUT
Exposed pad
NC
Function
LDO input voltage
Common ground
Enable pin logic input: low = shutdown, high = active. Don't leave this pin floating
Adjustable pin (on adjustable version)
LDO output voltage
Must be connected to GND
Not connected
DS10321
-
Rev 3
page 3/32
LDL112
Typical application
3
Typical application
Figure 5.
Typical application circuits
V
IN
V
I
V
O
V
OUT
R
1
C
Out
R
2
1µF
V
IN
ON
OFF
V
I
EN
V
O
V
OUT
LDL112
C
In
ON
LDL112
GND
C
Out
1µF
1µF
OFF
EN
GND
C
In
1µF
Adjustable version
Fixed version
AM14039V1
DS10321
-
Rev 3
page 4/32
LDL112
Maximum ratings
4
Maximum ratings
Table 2.
Absolute maximum ratings
Symbol
V
IN
V
OUT
V
EN
V
ADJ
I
OUT
P
D
T
STG
T
OP
DC input voltage
DC output voltage
Enable input voltage
ADJ pin voltage
Output current
Power dissipation
Storage temperature range
Operating junction temperature range
Parameter
Value
- 0.3 to 7
- 0.3 to V
I
+ 0.3
- 0.3 to V
I
+ 0.3
2
Internally limited
Internally limited
- 65 to 150
- 40 to 125
Unit
V
V
V
V
mA
mW
°C
°C
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional
operation under these conditions is not implied. All values are referred to GND.
Table 3.
Thermal data
Symbol
R
thJA
R
thJC
Parameter
Thermal resistance
junction-ambient
Thermal resistance
junction-case
DFN6 (3x3)
55
10
DFN6 (2x2)
65
15
SO8
55
(1)
20
PPAK
100
8
Unit
°C/W
°C/W
1. Considering 6 cm² of copper board heatsink.
DS10321
-
Rev 3
page 5/32
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