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M27C512-80C1TR

64K X 8 OTPROM, 90 ns, PDSO28
64K × 8 OTPROM, 90 ns, PDSO28

器件类别:存储    存储   

厂商名称:ST(意法半导体)

厂商官网:http://www.st.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
ST(意法半导体)
零件包装代码
QFJ
包装说明
PLASTIC, LCC-32
针数
32
Reach Compliance Code
_compli
ECCN代码
EAR99
最长访问时间
80 ns
I/O 类型
COMMON
JESD-30 代码
R-PQCC-J32
JESD-609代码
e0
长度
13.97 mm
内存密度
524288 bi
内存集成电路类型
OTP ROM
内存宽度
8
功能数量
1
端子数量
32
字数
65536 words
字数代码
64000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
64KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装等效代码
LDCC32,.5X.6
封装形状
RECTANGULAR
封装形式
CHIP CARRIER
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
5 V
认证状态
Not Qualified
座面最大高度
3.56 mm
最大待机电流
0.0001 A
最大压摆率
0.03 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
11.43 mm
文档预览
M27C512
512 Kbit (64K x8) UV EPROM and OTP EPROM
Features
5V ± 10% supply voltage in read operation
Access time: 45 ns
Low power “CMOS” consumption:
– Active current 30 mA
– Standby current 100 µA
Programming voltage: 12.75 V ± 0.25 V
Programming time around 6 s.
Electronic Signature
– Manufacturer code: 20h
– Device code: 3Dh
Packages
– ECOPACK
®
versions
28
28
1
FDIP28W (F)
1
PDIP28 (B)
PLCC32 (C)
Table 1.
Package
PDIP28
PLCC32
Device summary
45 ns
70 ns
90 ns
M27C512-90B6
M27C512-70C6
M27C512-90C1
M27C512-
10C6
M27C512-
10F1
M27C512-
12C3
M27C512-
12F1
M27C512-
12F3
M27C512-15F1
M27C512-15F6
100 ns
120 ns
150 ns
FDIP28W
M27C512-45XF1
M27C512-70XF1
M27C512-90F1
M27C512-90F6
May 2007
Rev 3
1/22
www.st.com
1
Contents
M27C512
Contents
1
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Device operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Two line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
PRESTO IIB programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
4
5
6
7
8
Erasure operation (applies for UV EPROM) . . . . . . . . . . . . . . . . . . . . . . 9
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
2/22
M27C512
Description
1
Description
The M27C512 is a 512 Kbit EPROM offered in the two ranges UV (ultra violet erase) and
OTP (one time programmable). It is ideally suited for applications where fast turn-around
and pattern experimentation are important requirements and is organized as 65536 by 8
bits.
The FDIP28W (window ceramic frit-seal package) has transparent lid which allows the user
to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27C512 is offered in FDIP28W, PDIP28, and PLCC32 packages. In order to
meet environmental requirements, ST offers the M27C512 in ECOPACK
®
packages.
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at:
www.st.com.
Figure 1.
Logic diagram
VCC
16
A0-A15
8
Q0-Q7
E
GVPP
M27C512
VSS
AI00761B
Table 2.
Signal names
Name
Description
Address Inputs
Data outputs
Chip Enable
Output Enable / Program Supply
Supply Voltage
Ground
Not Connected Internally
Don’t Use
Direction
Inputs
Outputs
Input
Input
Supply
Supply
-
-
A0-A15
Q0-Q7
E
GV
PP
V
CC
V
SS
NC
DU
3/22
Description
Figure 2.
DIP connections
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1
28
2
27
3
26
4
25
5
24
6
23
7
22
M27C512
8
21
9
20
10
19
11
18
12
17
13
16
14
15
AI00762
M27C512
VCC
A14
A13
A8
A9
A11
GVPP
A10
E
Q7
Q6
Q5
Q4
Q3
Figure 3.
LCC connections
A7
A12
A15
DU
VCC
A14
A13
1 32
A6
A5
A4
A3
A2
A1
A0
NC
Q0
A8
A9
A11
NC
GVPP
A10
E
Q7
Q6
9
M27C512
25
17
Q1
Q2
VSS
DU
Q3
Q4
Q5
AI00763
4/22
M27C512
Device operation
2
Device operation
The modes of operations of the M27C512 are listed in the Operating Modes table. A single
power supply is required in the read mode. All inputs are TTL levels except for GV
PP
and
12V on A9 for Electronic Signature.
2.1
Read mode
The M27C512 has two control functions, both of which must be logically active in order to
obtain data at the outputs. Chip Enable (E) is the power control and should be used for
device selection. Output Enable (G) is the output control and should be used to gate data to
the output pins, independent of device selection. Assuming that the addresses are stable,
the address access time (t
AVQV
) is equal to the delay from E to output (t
ELQV
). Data is
available at the output after a delay of t
GLQV
from the falling edge of G, assuming that E has
been low and the addresses have been stable for at least t
AVQV
-t
GLQV
.
2.2
Standby mode
The M27C512 has a standby mode which reduces the active current from 30mA to 100µA
The M27C512 is placed in the standby mode by applying a CMOS high signal to the E input.
When in the standby mode, the outputs are in a high impedance state, independent of the
GV
PP
input.
Table 3.
Operating modes
(1)
Mode
Read
Output Disable
Program
Program Inhibit
Standby
Electronic Signature
1.
E
V
IL
V
IL
V
IL
Pulse
V
IH
V
IH
V
IL
GV
PP
V
IL
V
IH
V
PP
V
PP
X
V
IL
A9
X
X
X
X
X
V
ID
Q7-Q0
Data Out
Hi-Z
Data In
Hi-Z
Hi-Z
Codes
X = V
IH
or V
IL
, V
ID
= 12V ± 0.5V.
Electronic Signature
A0
V
IL
V
IH
Q7
0
0
Q6
0
0
Q5
1
1
Q4
0
1
Q3
0
1
Q2
0
1
Q1
0
0
Q0
0
1
Hex Data
20h
3Dh
Table 4.
Identifier
Manufacturer’s
Code
Device Code
5/22
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00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
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