½This
data sheet describes Spec. H and Spec. A of 3850 Group. The header of each page shows which specification is explained in
the page. The page explaining about both specifications shows the header of “Spec. H/A”.
3850 Group (Spec.H/A)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3850 Group (Spec.H)
REJ03B0036-0301Z
Rev.3.01
2003.06.20
DESCRIPTION
The 3850 group (spec. H) is the 8-bit microcomputer based on the
740 family core technology.
The 3850 group (spec. H) is designed for the household products
and office automation equipment and includes serial I/O functions,
8-bit timer, and A-D converter.
FEATURES
qBasic
machine-language instructions ...................................... 71
qMinimum
instruction execution time .................................. 0.5
µs
(at 8 MHz oscillation frequency)
qMemory
size
ROM ................................................................... 8K to 32K bytes
RAM ................................................................. 512 to 1024 bytes
qProgrammable
input/output ports ............................................ 34
qInterrupts
................................................. 15 sources, 14 vectors
qTimers
............................................................................. 8-bit
✕
4
qSerial
I/O1 .................... 8-bit
✕
1(UART or Clock-synchronized)
qSerial
I/O2 ................................... 8-bit
✕
1(Clock-synchronized)
qPWM
............................................................................... 8-bit
✕
1
qA-D
converter ............................................... 10-bit
✕
5 channels
qWatchdog
timer ............................................................ 16-bit
✕
1
qClock
generating circuit ..................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
qPower
source voltage
In high-speed mode .................................................. 4.0 to 5.5 V
(at 8 MHz oscillation frequency)
In middle-speed mode ............................................... 2.7 to 5.5 V
(at 8 MHz oscillation frequency)
In low-speed mode .................................................... 2.7 to 5.5 V
(at 32 kHz oscillation frequency)
qPower
dissipation
In high-speed mode .......................................................... 34 mW
(at 8 MHz oscillation frequency, at 5 V power source voltage)
In low-speed mode
Except M38507F8FP/SP ................................................... 60
µW
M38507F8FP/SP ............................................................. 450
µW
(at 32 kHz oscillation frequency, at 3 V power source voltage)
qOperating
temperature range .................................... –20 to 85°C
APPLICATION
Office automation equipment, FA equipment, Household products,
Consumer electronics, etc.
PIN CONFIGURATION (TOP VIEW)
V
CC
V
REF
AV
SS
P4
4
/INT
3
/PWM
P4
3
/INT
2
/S
CMP2
P4
2
/INT
1
P4
1
/INT
0
P4
0
/CNTR
1
P2
7
/CNTR
0
/S
RDY1
P2
6
/S
CLK1
P2
5
/TxD
P2
4
/RxD
P2
3
P2
2
CNV
SS
V
PP
P2
1
/X
CIN
P2
0
/X
COUT
RESET
X
IN
X
OUT
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P3
0
/AN
0
P3
1
/AN
1
P3
2
/AN
2
P3
3
/AN
3
P3
4
/AN
4
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
P0
5
P0
6
P0
7
P1
0
/(LED
0
)
P1
1
/(LED
1
)
P1
2
/(LED
2
)
P1
3
/(LED
3
)
P1
4
/(LED
4
)
P1
5
/(LED
5
)
P1
6
/(LED
6
)
P1
7
/(LED
7
)
Package type : FP ........................... 42P2R-A/E (42-pin plastic-molded SSOP)
Package type : SP ........................... 42P4B (42-pin plastic-molded SDIP)
Fig. 1 M38503MXH-XXXFP/SP pin configuration (spec. H)
M38503MXH-XXXFP/SP
: Flash memory version
Rev.3.01
2003.06.20
page 1 of 98
1
3850 Group (Spec.A)
DESCRIPTION
The 3850 group (spec. A) is the 8-bit microcomputer based on the
740 family core technology.
The 3850 group (spec. A) is designed for the household products
and office automation equipment and includes serial I/O functions,
8-bit timer, and A-D converter.
FEATURES
qBasic
machine-language instructions ...................................... 71
qMinimum
instruction execution time ................................ 0.32
µs
(at 12.5 MHz oscillation frequency)
qMemory
size
ROM ................................................................... 8K to 16K bytes
RAM .............................................................................. 512 bytes
qProgrammable
input/output ports ............................................ 34
qOn-chip
software pull-up resistor
qInterrupts
................................................. 15 sources, 14 vectors
qTimers
............................................................................. 8-bit
✕
4
qSerial
I/O1 .................... 8-bit
✕
1(UART or Clock-synchronized)
qSerial
I/O2 ................................... 8-bit
✕
1(Clock-synchronized)
qPWM
............................................................................... 8-bit
✕
1
qA-D
converter ............................................... 10-bit
✕
9 channels
qWatchdog
timer ............................................................ 16-bit
✕
1
qClock
generating circuit ..................................... Built-in 2 circuits
(connect to external ceramic resonator or quartz-crystal oscillator)
qPower
source voltage
In high-speed mode .................................................. 4.0 to 5.5 V
(at 12.5 MHz oscillation frequency)
In high-speed mode .................................................. 2.7 to 5.5 V
(at 6 MHz oscillation frequency)
In middle-speed mode ............................................... 2.7 to 5.5 V
(at 12.5 MHz oscillation frequency)
In low-speed mode .................................................... 2.7 to 5.5 V
(at 32 kHz oscillation frequency)
qPower
dissipation
In high-speed mode
Except M38507F8FP/SP ................................................ 32.5mW
M38507F8FP/SP ............................................................ 37.5mW
(at 12.5 MHz oscillation frequency, at 5 V power source voltage)
In low-speed mode
Except M38507F8FP/SP ................................................... 60
µW
M38507F8FP/SP ............................................................. 450
µW
(at 32 kHz oscillation frequency, at 3 V power source voltage)
qOperating
temperature range .................................... –20 to 85°C
APPLICATION
Office automation equipment, FA equipment, Household products,
Consumer electronics, etc.
PIN CONFIGURATION (TOP VIEW)
V
CC
V
REF
AV
SS
P4
4
/INT
3
/PWM
P4
3
/INT
2
/S
CMP2
P4
2
/INT
1
P4
1
/INT
0
P4
0
/CNTR
1
P2
7
/CNTR
0
/S
RDY1
P2
6
/S
CLK1
P2
5
/TxD
P2
4
/RxD
P2
3
P2
2
CNV
SS
V
PP
P2
1
/X
CIN
P2
0
/X
COUT
RESET
X
IN
X
OUT
V
SS
P3
0
/AN
0
P3
1
/AN
1
P3
2
/AN
2
P3
3
/AN
3
P3
4
/AN
4
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
/AN
5
P0
5
/AN
6
P0
6
/AN
7
P0
7
/AN
8
P1
0
/(LED
0
)
P1
1
/(LED
1
)
P1
2
/(LED
2
)
P1
3
/(LED
3
)
P1
4
/(LED
4
)
P1
5
/(LED
5
)
P1
6
/(LED
6
)
P1
7
/(LED
7
)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
Package type : FP ........................... 42P2R-A/E (42-pin plastic-molded SSOP)
Package type : SP ........................... 42P4B (42-pin plastic-molded SDIP)
Fig. 2 M38503MXA-XXXFP/SP pin configuration (spec. A)
M38503MXA-XXXFP/SP
: Flash memory version
Rev.3.01
2003.06.20
page 2 of 98
FUNCTIONAL BLOCK
Rev.3.01
Reset input
V
S S
V
C C
RESET
18
15
1
21
FUNCTIONAL BLOCK DIAGRAM
3850 Group (Spec.H)
Fig. 3 Functional block diagram (spec. H)
CNV
SS
2003.06.20
C P U
Main-clock
input
X
IN
Main-clock
output
X
OUT
19
20
page 3 of 98
ROM
X
Prescaler 12(8)
Sub-clock Sub-clock
input
output
X
CIN
X
COUT
Clock generating circuit
A
Timer 1( 8 )
Timer 2( 8 )
Timer X( 8 )
Timer Y( 8 )
RAM
Y
Prescaler X(8)
S
PC
H
PS
CNTR
1
PC
L
CNTR
0
Prescaler Y(8)
Watchdog
timer
Reset
A-D
converter
(10)
P WM
(8)
SI/O1(8)
SI/O2(8)
X
COUT
INT
0
–
INT
3
X
CIN
P4(5)
P3(5)
P2(8)
P1(8)
P0(8)
2 3
38 39 40 41 42
4 5 6 7 8
9 10 11 12 13 1416 17
22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37
I/O port P4
I/O port P3
I/O port P2
I/O port P1
I/O port P0
V
REF
AV
SS
Rev.3.01
Reset input
V
SS
V
CC
RESET
18
15
1
21
FUNCTIONAL BLOCK DIAGRAM
Main-clock
input
X
IN
CNV
SS
Main-clock
output
X
OUT
3850 Group (Spec.A)
Fig. 4 Functional block diagram (spec. A)
2003.06.20
C P U
19
20
Sub-clock Sub-clock
input
output
X
CIN
X
COUT
Clock generating circuit
page 4 of 98
ROM
X
Prescaler 12(8)
RAM
Timer 2( 8 )
Timer X( 8 )
Timer Y( 8 )
Y
Prescaler X(8)
A
Timer 1( 8 )
S
PC
H
PS
CNTR
1
PC
L
Prescaler Y(8)
CNTR
0
Watchdog
timer
Reset
A-D
converter
(10)
PWM
(8)
SI/O1(8)
SI/O2(8)
X
COUT
INT
0
–
INT
3
X
CIN
P4(5)
P3(5)
P2(8)
P1(8)
P0(8)
2 3
38 39 40 41 42
4 5 6 7 8
9 10 11 12 13 1416 17
22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37
I/O port P4
I/O port P3
I/O port P2
I/O port P1
I/O port P0
V
REF
AV
SS
3850 Group (Spec.H)
Table 1 Pin description (spec. H)
Pin
V
CC
, V
SS
CNV
SS
RESET
X
IN
X
OUT
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
–P0
7
P1
0
–P1
7
P2
0
/X
COUT
P2
1
/X
CIN
P2
2
P2
3
P2
4
/RxD
P2
5
/TxD
P2
6
/S
CLK1
P2
7
/CNTR
0
/
S
RDY1
P3
0
/AN
0
–
P3
4
/AN
4
P4
0
/CNTR
1
P4
1
/INT
0
P4
2
/INT
1
I/O port P4
P4
3
/INT
2
/S
CMP2
P4
4
/INT
3
/PWM
•8-bit CMOS I/O port with the same function as port P0.
I/O port P3
•CMOS compatible input level.
•CMOS 3-state output structure.
•8-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
• Interrupt input pin
• S
CMP2
output pin
• Interrupt input pin
• PWM output pin
• Timer Y function pin
• Interrupt input pins
• Serial I/O1 function pin/
Timer X function pin
• A-D converter input pin
I/O port P2
Name
Power source
CNV
SS
input
Reset input
Clock input
Clock output
Functions
•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
•This pin controls the operation mode of the chip.
•Normally connected to V
SS
.
•Reset input pin for active “L”.
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
•When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•CMOS 3-state output structure.
I/O port P1
•P1
0
to P1
7
(8 bits) are enabled to output large current for LED drive.
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
programmed as either input or output.
•CMOS compatible input level.
•P2
0
, P2
1
, P2
4
to P2
7
: CMOS3-state output structure.
•P2
2
, P2
3
: N-channel open-drain structure.
• Serial I/O1 function pin
• Sub-clock generating circuit I/O
pins (connect a resonator)
• Serial I/O2 function pin
Function except a port function
I/O port P0
Rev.3.01
2003.06.20
page 5 of 98
FPGA/CPLD
