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MAX1248ACEE

Analog to Digital Converters - ADC 10-Bit 4Ch 133ksps 5.25V Precision ADC

器件类别:模拟混合信号IC    转换器   

厂商名称:Maxim(美信半导体)

厂商官网:https://www.maximintegrated.com/en.html

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Maxim(美信半导体)
零件包装代码
SOIC
包装说明
0.150 INCH, 0.025 INCH PITCH, QSOP-16
针数
16
Reach Compliance Code
not_compliant
ECCN代码
EAR99
最大模拟输入电压
1.25 V
最小模拟输入电压
-1.25 V
最长转换时间
65 µs
转换器类型
ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码
R-PDSO-G16
JESD-609代码
e0
长度
4.9 mm
最大线性误差 (EL)
0.0488%
湿度敏感等级
1
模拟输入通道数量
4
位数
10
功能数量
1
端子数量
16
最高工作温度
70 °C
最低工作温度
输出位码
BINARY, 2\'S COMPLEMENT BINARY
输出格式
SERIAL
封装主体材料
PLASTIC/EPOXY
封装代码
SSOP
封装等效代码
SSOP16,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度)
240
电源
3/5 V
认证状态
Not Qualified
采样速率
0.0133 MHz
采样并保持/跟踪并保持
TRACK
座面最大高度
1.75 mm
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn85Pb15)
端子形式
GULL WING
端子节距
0.635 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
20
宽度
3.9 mm
Base Number Matches
1
文档预览
19-1072; Rev 2; 5/98
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
_______________General
Description
The MAX1248/MAX1249 10-bit data-acquisition sys-
tems combine a 4-channel multiplexer, high-bandwidth
track/hold, and serial interface with high conversion
speed and low power consumption. They operate from
a single +2.7V to +5.25V supply, and their analog
inputs are software configurable for unipolar/bipolar
and single-ended/differential operation.
The 4-wire serial interface connects directly to SPI™/
QSPI™ and MICROWIRE™ devices without external
logic. A serial strobe output allows direct connection
to TMS320-family digital signal processors. The
MAX1248/MAX1249 use either the internal clock or an
external serial-interface clock to perform successive-
approximation analog-to-digital conversions.
The MAX1248 has an internal 2.5V reference, while the
MAX1249 requires an external reference. Both parts
have a reference-buffer amplifier with a ±1.5% voltage
adjustment range.
These devices provide a hard-wired
SHDN
pin and a
software-selectable power-down, and can be pro-
grammed to automatically shut down at the end of a
conversion. Accessing the serial interface automatically
powers up the MAX1248/MAX1249, and the quick
turn-on time allows them to be shut down between all
conversions. This technique can cut supply current to
under 60µA at reduced sampling rates.
The MAX1248/MAX1249 are available in a 16-pin DIP
and a very small QSOP that occupies the same board
area as an 8-pin SO.
For 8-channel versions of these devices, see the
MAX148/MAX149 data sheet.
____________________________Features
o
4-Channel Single-Ended or 2-Channel
Differential Inputs
o
Single +2.7V to +5.25V Operation
o
Internal 2.5V Reference (MAX1248)
o
Low Power: 1.2mA (133ksps, +3V supply)
54µA (1ksps, +3V supply)
1µA (power-down mode)
o
SPI/QSPI/MICROWIRE/TMS320-Compatible
4-Wire Serial Interface
o
Software-Configurable Unipolar or Bipolar Inputs
o
16-Pin QSOP Package (same area as 8-pin SO)
MAX1248/MAX1249
_____________Ordering
Information
PART
MAX1248ACPE
MAX1248BCPE
MAX1248ACEE
MAX1248BCEE
Contact
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
16 Plastic DIP
16 Plastic DIP
16 QSOP
16 QSOP
INL
(LSB)
±1/2
±1
±1/2
±1
Ordering Information continued at end of data sheet.
factory for availability of alternate surface-mount
packages.
________________________Applications
Portable Data Logging
Medical Instruments
Pen Digitizers
Data Acquisition
Battery-Powered Instruments
System Supervision
__________Typical Operating Circuit
+3V
CH0
0V TO
+2.5V
ANALOG
INPUTS
V
DD
DGND
C3
0.1µF
V
DD
MAX1248
AGND
CH3
COM
CS
SCLK
VREF
I/O
SCK (SK)
MOSI (SO)
MISO (SI)
V
SS
CPU
Pin Configuration appears at end of data sheet.
C1
4.7µF
REFADJ
C2
0.01µF
DIN
DOUT
SSTRB
SHDN
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 408-737-7600 ext. 3468.
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
MAX1248/MAX1249
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND, DGND .............................................. -0.3V to +6V
AGND to DGND.................................................... -0.3V to +0.3V
CH0–CH3, COM to AGND, DGND ............ -0.3V to (V
DD
+ 0.3V)
VREF to AGND........................................... -0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND............................................ -0.3V to +6V
Digital Outputs to DGND ........................... -0.3V to (V
DD
+ 0.3V)
Digital Output Sink Current .................................................25mA
Continuous Power Dissipation (T
A
= +70°C)
Plastic DIP (derate 10.53mW/°C above +70°C) ......... 842mW
QSOP (derate 8.30mW/°C above +70°C) ................... 667mW
CERDIP (derate 10.00mW/°C above +70°C) .............. 800mW
Operating Temperature Ranges
MAX1248_C_E/MAX1249_C_E .......................... 0°C to +70°C
MAX1248_E_E/MAX1249_E_E........................ -40°C to +85°C
MAX1248_MJE/MAX1249_MJE .................... -55°C to +125°C
Storage Temperature Range ............................ -60°C to +150°C
Lead Temperature (soldering, 10sec) ............................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +2.7V to +5.25V; COM = 0V; f
SCLK
= 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps);
MAX1248—4.7µF capacitor at VREF pin; MAX1249—external reference, VREF = 2.500V applied to VREF pin; T
A
= T
MIN
to T
MAX
,
unless otherwise noted.)
PARAMETER
DC ACCURACY
(Note 1)
Resolution
Relative Accuracy (Note 2)
Differential Nonlinearity
Offset Error
Gain Error (Note 3)
Gain Temperature Coefficient
Channel-to-Channel Offset
Matching
INL
DNL
MAX124_A
MAX124_B
No missing codes over temperature
MAX124_A
MAX124_B
MAX124_A
MAX124_B
±0.25
±0.05
SYMBOL
CONDITIONS
MIN
10
±0.5
±1.0
±1
±1
±2
±1
±2
TYP
MAX
UNITS
Bits
LSB
LSB
LSB
LSB
ppm/°C
LSB
DYNAMIC SPECIFICATIONS
(10kHz sine-wave input, 0V to 2.500Vp-p, 133ksps, 2.0MHz external clock, bipolar input mode)
Signal-to-Noise + Distortion Ratio
SINAD
66
dB
Total Harmonic Distortion
Spurious-Free Dynamic Range
Channel-to-Channel Crosstalk
Small-Signal Bandwidth
Full-Power Bandwidth
CONVERSION RATE
Internal clock,
SHDN
= FLOAT
Conversion Time (Note 5)
Track/Hold Acquisition Time
Aperture Delay
Aperture Jitter
Internal Clock Frequency
External Clock Frequency
2
SHDN
= FLOAT
SHDN
= V
DD
Data transfer only
0.1
0
t
CONV
t
ACQ
30
<50
1.8
0.225
2.0
2.0
Internal clock,
SHDN
= V
DD
External clock = 2MHz, 12 clocks/conversion
5.5
35
6
1.5
µs
ns
ps
MHz
MHz
7.5
65
µs
THD
SFDR
65kHz, 2.500Vp-p (Note 4)
-3dB rolloff
Up to the 5th harmonic
-70
70
-75
2.25
1.0
dB
dB
dB
MHz
MHz
_______________________________________________________________________________________
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V; COM = 0V; f
SCLK
= 2.0MHz; external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps);
MAX1248—4.7µF capacitor at VREF pin; MAX1249—external reference, VREF = 2.500V applied to VREF pin; T
A
= T
MIN
to T
MAX
,
unless otherwise noted.)
PARAMETER
ANALOG/COM INPUTS
Input Voltage Range, Single-
Ended and Differential (Note 6)
Multiplexer Leakage Current
Input Capacitance
INTERNAL REFERENCE
(MAX1248 only, reference buffer enabled)
VREF Output Voltage
VREF Short-Circuit Current
VREF Temperature Coefficient
Load Regulation (Note 8)
Capacitive Bypass at VREF
Capacitive Bypass at REFADJ
REFADJ Adjustment Range
EXTERNAL REFERENCE AT VREF
(Buffer disabled)
VREF Input Voltage Range
(Note 9)
VREF Input Current
VREF Input Resistance
Shutdown VREF Input Current
REFADJ Buffer-Disable Threshold
EXTERNAL REFERENCE AT REFADJ
Capacitive Bypass at VREF
Reference-Buffer Gain
REFADJ Input Current
DIGITAL INPUTS
(DIN, SCLK,
CS, SHDN)
DIN, SCLK,
CS
Input High Voltage
DIN, SCLK,
CS
Input Low Voltage
DIN, SCLK,
CS
Input Hysteresis
DIN, SCLK,
CS
Input Leakage
DIN, SCLK,
CS
Input Capacitance
SHDN
Input High Voltage
SHDN
Input Mid Voltage
SHDN
Input Low Voltage
SHDN
Input Current
V
IH
V
IL
V
HYST
I
IN
C
IN
V
SH
V
SM
V
SL
I
S
SHDN
= 0V or V
DD
V
IN
= 0V or V
DD
(Note 10)
V
DD
- 0.4
1.1
V
DD
- 1.1
0.4
±4.0
0.2
±0.01
±1
15
V
DD
3.6V
V
DD
> 3.6V
2.0
3.0
0.8
V
V
V
µA
pF
V
V
V
µA
Internal compensation mode
External compensation mode
MAX1248
MAX1249
MAX1248
MAX1249
0
4.7
2.06
2.00
±50
±10
µF
V/V
µA
V
DD -
0.5
VREF = 2.500V
18
1.0
100
25
0.01
10
V
DD
+
50mV
150
V
µA
kΩ
µA
V
MAX1248
0mA to 0.2mA output load
Internal compensation mode
External compensation mode
0
4.7
0.01
±1.5
±30
0.35
T
A
= +25°C (Note 7)
2.470
2.500
2.530
30
V
mA
ppm/°C
mV
µF
µF
%
SYMBOL
CONDITIONS
Unipolar, COM = 0V
Bipolar, COM = VREF / 2
On/off leakage current, V
CH_
= 0V or V
DD
MIN
TYP
MAX
UNITS
MAX1248/MAX1249
0 to VREF
±VREF / 2
±0.01
±1
16
V
µA
pF
_______________________________________________________________________________________
3
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
MAX1248/MAX1249
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +2.7V to +5.25V; COM = 0V; f
SCLK
= 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion cycle (133ksps);
MAX1248—4.7µF capacitor at VREF pin; MAX1249—external reference; VREF = 2.500V applied to VREF pin, T
A
= T
MIN
to T
MAX
,
unless otherwise noted.)
PARAMETER
SHDN
Voltage, Floating
SHDN
Maximum Allowed
Leakage, Mid Input
DIGITAL OUTPUTS
(DOUT, SSTRB)
Output Voltage Low
Output Voltage High
Three-State Leakage Current
Three-State Output Capacitance
POWER REQUIREMENTS
Positive Supply Voltage
V
OL
V
OH
I
L
C
OUT
V
DD
Operating mode,
full-scale input (Note 11)
Positive Supply Current
I
DD
Full power-down
I
DD
Supply Rejection (Note 12)
PSR
V
DD
= 5.25V
V
DD
= 3.6V
V
DD
= 5.25V
V
DD
= 3.6V
I
SINK
= 5mA
I
SINK
= 16mA
I
SOURCE
= 0.5mA
CS
= V
DD
CS
= V
DD
(Note 10)
2.70
1.6
1.2
3.5
1.2
30
±0.3
V
DD
- 0.5
±0.01
±10
15
5.25
3.0
2.0
15
10
70
mV
µA
0.4
0.8
V
V
µA
pF
V
mA
SYMBOL
V
FLT
SHDN
= FLOAT
SHDN
= FLOAT
CONDITIONS
MIN
TYP
V
DD
/ 2
±100
MAX
UNITS
V
nA
Fast power-down (MAX1248) V
DD
= 5.25V
V
DD
= 2.7V to 5.25V, full-scale input,
external reference = 2.500V
4
_______________________________________________________________________________________
+2.7V to +5.25V, Low-Power, 4-Channel,
Serial 10-Bit ADCs in QSOP-16
TIMING CHARACTERISTICS
(V
DD
= +2.7V to +5.25V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK Fall to Output Data Valid
CS
Fall to Output Enable
CS
Rise to Output Disable
CS
to SCLK Rise Setup
CS
to SCLK Rise Hold
SCLK Pulse Width High
SCLK Pulse Width Low
SCLK Fall to SSTRB
CS
Fall to SSTRB Output Enable
CS
Rise to SSTRB Output Disable
SSTRB Rise to SCLK Rise
SYMBOL
t
ACQ
t
DS
t
DH
t
DO
t
DV
t
TR
t
CSS
t
CSH
t
CH
t
CL
t
SSTRB
t
SDV
t
STR
t
SCK
Figure 1
External clock mode only, Figure 1
External clock mode only, Figure 2
Internal clock mode only (Note 10)
0
Figure 1
Figure 1
Figure 2
100
0
200
200
240
240
240
MAX124_ _C/E
MAX124_ _M
20
20
CONDITIONS
MIN
1.5
100
0
200
240
240
240
TYP
MAX
UNITS
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX1248/MAX1249
Note 1:
Tested at V
DD
= 2.7V; COM = 0V; unipolar single-ended input mode.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3:
MAX1248—internal reference, offset nulled; MAX1249 — external reference (VREF = +2.500V), offset nulled.
Note 4:
Ground “on” channel; sine wave applied to all “off” channels.
Note 5:
Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6:
The common-mode range for the analog inputs is from AGND to V
DD
.
Note 7
Sample tested to 0.1% AQL.
Note 8:
External load should not change during conversion for specified accuracy.
Note 9:
ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 10
Guaranteed by design. Not subject to production testing.
Note 11:
The MAX1249 typically draws 400µA less than the values shown.
Note 12:
Measured as
|
V
FS
(2.7V) - V
FS
(5.25V)
|
.
_______________________________________________________________________________________
5
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