Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
CC
= +1.2V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise specified. Typical values are at V
CC
= +5V and T
A
= +25°C.) (Note 1)
PARAMETER
Supply Voltage
SYMBOL
V
CC
CONDITIONS
T
A
= 0°C to +125°C
T
A
= -40°C to 0°C
V
CC
≤ 5.5V
Supply Current
I
CC
V
CC
≤ 3.3V
V
CC
≤ 2.0V
V
CC
Reset Threshold
Hysteresis
V
CC
to Reset Delay
Reset Timeout Period
SRT Ramp Current
SRT Ramp Threshold
Normal Watchdog Timeout Period
(MAX6746–MAX6751)
Extended Watchdog Timeout
(MAX6746–MAX6751)
Slow Watchdog Period
(MAX6752/MAX6753)
Fast Watchdog Timeout Period,
SET Ratio = 8,
(MAX6752/MAX6753)
Fast Watchdog Timeout Period,
SET Ratio = 16,
(MAX6752/MAX6753)
t
RP
I
RAMP
V
RAMP
t
WD
t
WD
t
WD2
t
WD1
V
TH
V
HYST
V
CC
falling from V
TH
+ 100mV to V
TH
-100mV at 1mV/µs
C
SRT
= 1500pF
C
SRT
= 100pF
V
SRT
= 0 to 1.23V; V
CC
= 1.6V to 5V
V
CC
= 1.6V to 5V (V
RAMP
rising)
C
SWT
= 1500pF
C
SWT
= 100pF
C
SWT
= 1500pF
C
SWT
= 100pF
C
SWT
= 1500pF
C
SWT
= 100pF
C
SWT
= 1500pF
C
SWT
= 100pF
C
SWT
= 1500pF
C
SWT
= 100pF
45.53
91.08
728.6
728.6
200
1.173
5.692
5.692
See V
TH
selection table
T
A
= -40°C to +125°C
V
TH
-
2%
0.8
20
7.590
0.506
250
1.235
7.590
0.506
971.5
64.77
971.5
64.77
121.43
8.09
60.71
4.05
75.89
151.80
1214.4
1214.4
300
1.297
9.487
9.487
MIN
1.0
1.2
5
4.2
3.7
TYP
MAX
5.5
5.5
10
9
8
V
TH
+
2%
V
%
µs
ms
nA
V
ms
ms
ms
ms
µA
UNITS
V
t
WD1
ms
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Maxim Integrated
│
2
MAX6746–MAX6753
μP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Electrical Characteristics (continued)
(V
CC
= +1.2V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise specified. Typical values are at V
CC
= +5V and T
A
= +25°C.) (Note 1)
PARAMETER
Fast Watchdog Timeout Period,
SET Ratio = 64,
(MAX6752/MAX6753)
Fast Watchdog Minimum Period
(MAX6752/MAX6753)
SWT Ramp Current
SWT Ramp Threshold
RESET
Output-Voltage Low
Open-Drain, Push-Pull
(Asserted)
RESET
Output-Voltage High,
Push-Pull (Not Asserted)
RESET
Output Leakage Current,
Open Drain
I
RAMP
V
RAMP
V
OL
V
SWT
= 0 to 1.23V, V
CC
= 1.6V to 5V
V
CC
= 1.6V to 5V (V
RAMP
rising)
V
CC
≥
1.0V, I
SINK
= 50µA
V
CC
≥
2.7V, I
SINK
= 1.2mA
V
CC
≥
4.5V, I
SINK
= 3.2mA
V
CC
≥
1.8V, I
SOURCE
= 200µA
V
OH
V
CC
≥
2.25V, I
SOURCE
= 500µA
V
CC
≥
4.5V, I
SOURCE
= 800µA
I
LKG
V
CC
> V
TH
, reset not asserted,
V
RESET
= 5.5V
0.8 x V
CC
0.8 x V
CC
0.8 x V
CC
1.0
µA
V
SYMBOL
t
WD1
CONDITIONS
C
SWT
= 1500pF
C
SWT
= 100pF
2000
200
1.173
250
1.235
300
1.297
0.3
0.3
0.4
V
MIN
11.38
TYP
15.18
1.01
MAX
18.98
UNITS
ms
ns
nA
V
DIGITAL INPUTS (MR, SET0, SET1, WDI, WDS)
V
IL
Input Logic Levels
V
IH
V
IL
V
IH
MR
Minimum Pulse Width
MR
Glitch Rejection
MR-to-RESET
Delay
MR
Pullup Resistance
WDI Minimum Pulse Width
RESET IN
RESET IN Threshold
RESET IN Leakage Current
RESET IN to
RESET
Delay
V
RESET IN
I
RESET IN
RESET IN falling at 1mV/µs
T
A
= -40°C to +125°C
1.216
-50
1.235
±1
20
1.254
+50
V
nA
µs
Pullup to V
CC
12
300
V
CC
≥
4.0V
V
CC
< 4.0V
0.7 x V
CC
1
100
200
20
28
µs
ns
ns
kΩ
ns
0.8
2.4
0.3 x V
CC
V
Note 1:
Production testing done at T
A
= +25°C. Over temperature limits are guaranteed by design.
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Maxim Integrated
│
3
MAX6746–MAX6753
μP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Typical Operating Characteristics
(V
CC
= +5V, T
A
= +25°C, unless otherwise noted.)
MAX6746 toc01
MAX6746 toc02
1000
RESET TIMEOUT PERIOD (ms)
RESET TIMEOUT PERIOD vs. C
SRT
100,000
WATCHDOG TIMEOUT PERIOD (ms)
10,000
1000
100
10
1
0.1
WATCHDOG TIMEOUT PERIOD vs. C
SWT
MAX6746–MAX6751
EXTENDED MODE
6
5
SUPPLY CURRENT (µA)
4
3
2
1
100
1000
10,000
C
SWT
(pF)
100,000
0
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX6746 toc03
100
10
NORMAL MODE
1
0.1
100
1000
10,000
C
SRT
(pF)
100,000
1
2
3
4
5
6
SUPPLY VOLTAGE (V)
MAX6746 toc04
NORMALIZED TIMEOUT PERIOD
NORMALIZED TIMEOUT PERIOD
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-50
-25
0
25
50
75
100
125
C
SWT
= 100pF
C
SWT
= 1500pF
TRANSIENT DURATION (µs)
1.15
1.10
1.05
1.00
0.95
0.90
1.15
MAX6746 toc05
150
125
100
75
50
25
0
0
200
400
600
V
TH
= 2.92V
800
RESET OCCURS
ABOVE THE CURVE
C
SRT
= 100pF
C
SRT
= 1500pF
-50
-25
0
25
50
75
100
125
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (mV)
SUPPLY CURRENT
vs. TEMPERATURE
NORMALIZED RESET THRESHOLD VOLTAGE
MAX6746 toc07
MAX6746 toc08
4
3
2
1
0
V
CC
= 1.8V
V
CC
= 3.3V
1.004
1.002
1.000
0.998
0.996
0.994
0.992
0.990
-50
-25
0
25
50
75
100
125
RESET IN THRESHOLD (V)
5
SUPPLY CURRENT (µA)
V
CC
= 5V
1.008
1.006
V
CC
= 5V
1.239
1.238
1.237
1.236
1.235
-50
-25
0
25
50
75
100
125
1
2
3
4
5
6
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
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Maxim Integrated
│
4
MAX6746 toc08b
6
1.010
NORMALIZED RESET IN THRESHOLD VOLTAGE
vs. TEMPERATURE
RESET IN THRESHOLD
vs. SUPPLY VOLTAGE
1.240
MAX6746 toc06
1.20
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
1.20
NORMALIZED WATCHDOG TIMEOUT PERIOD
vs. TEMPERATURE
175
MAXIMUM TRANSIENT DURATION
vs. RESET THRESHOLD OVERDRIVE
MAX6746–MAX6753
μP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
Typical Operating Characteristics (continued)
(V
CC
= +5V, T
A
= +25°C, unless otherwise noted.)
MAX6746 toc09
V
CC
FALLING AT 1mV/µs
C
SWT
= C
SRT
= 100pF
MAX6746 toc10
C
SWT
= C
SRT
= 1500pF
RESET
WATCHDOG
V
CC
TO RESET DELAY (µs)
TIMEOUT PERIOD (ms)
TIMEOUT PERIOD (ms)
26.6
26.2
25.8
25.4
25.0
0.56
0.52
0.48
0.44
0.40
8.5
8.0
7.5
7.0
6.5
6.0
-50
-25
0
25
50
75
100
125
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
CC
(V)
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
V
CC
(V)
TEMPERATURE (°C)
Pin Configuration
PIN
MAX6746
MAX6747
1
—
—
MAX6748–
MAX6751
—
1
—
MAX6752
MAX6753
—
—
1
NAME
FUNCTION
Manual-Reset Input. Pull
MR
low to manually reset the device. Reset
remains asserted for the reset timeout period after
MR
is released.
Reset Input. High-impedance input to the adjustable reset comparator.
Connect RESET IN to the center point of an external resistor-divider to
set the threshold of the externally monitored voltage.
Logic Input. SET0 selects watchdog window ratio or disables the
watchdog timer. See Table 1.
Watchdog Timeout Input.
MAX6746–MAX6751: Connect a capacitor between SWT and ground to
set the basic watchdog timeout period (t
WD
). Determine the period by
the formula tWD = 5.06 x 10
6
x CSWT with t
WD
in seconds and C
SWT
in Farads. Extend the basic watchdog timeout period by using the WDS
input. Connect SWT to ground to disable the watchdog timer function.
MAX6752/MAX6753: Connect a capacitor between SWT and ground
to set the slow watchdog timeout period (tWD2
). Determine the slow
watchdog period by the formula: t
WD2
= 0.65 x 10
9
x C
SWT
with t
WD2
in
seconds and C
SWT
in Farads. The fast watchdog timeout period is set
by pin strapping SET0 and SET1 (Connect SET0 high and SET1 low to
disable the watchdog timer function.) See Table 1.
Reset Timeout Input. Connect a capacitor from SRT to GND to select
the reset timeout period. Determine the period as follows: t
