FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13703-1E
16-bit Proprietary Microcontroller
CMOS
F MC-16LX MB90540/545 Series
MB90543/F543/549/F549/V540
s
DESCRIPTION
The MB90540/545 series with FULL-CAN and FLASH ROM is specially designed for automotive and industrial ap-
plications. Its main features are two on board CAN Interfaces (one for MB90V545 series), which conform to V2.0
Part A and Part B, supporting very flexible message buffering. Thus, offering more functions than a normal full CAN
approach. In the new 0.5µm Technology Fujitsu now also offer FLASH-ROM. An internal voltage booster substitutes
the necessity of a second programming voltage.
An on board voltage regulator provides 3V to the internal MCU core. This constitutes a major advantage in terms of
EMI and power consumption.
The internal PLL clock frequency multiplier, provides an internal 62.5 nsec instruction cycle time with an external 4
MHz clock.
Further more it features 4 channels Output Capture Units and 8 channels Input Capture Units with a 16-bit free run-
ning timer. Two UARTs constitute additional functionality for communication purposes.
The external bus interface allows full use to be made of the 16MByte address space.
2
s
FEATURES
•
•
•
•
•
16-bit core CPU : 4MHz external clock (16 MHz internal, 62.5 nsec instr. cycle time)
32 kHz Subsystem Clock
New 0.5
µm
CMOS Process Technology
Internal voltage regulator supports 3V MCU core, offering low EMI and low power consumption figures
FULL-CAN interfaces (MB90540 series : 2 interf., MB90545 series : 1 interf.); conform to Version 2.0 Part A
and Part B, flexible message buffering (mailbox and FIFO buffering can be mixed)
(Continued)
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PACKAGE
100-pin Plastic QFP
100-pin Plastic LQFP
(FPT-100P-M06)
(FPT-100P-M05)
MB90540/545 Series
(Continued)
• Powerful interrupt functions (8 progr. priority levels; 8 external interrupts)
• EI
2
OS - Automatic transfer function indep.of CPU
• 18-bit Time-base counter
• Watchdog Timer
• 2 full duplex UARTs; UART0 supports 10.4 KBaud (USA standard), UART 1 also for serial transfer with clock
(SCI) programmable
• Serial I/O: 1ch for synchronous data transfer
• A/D Converter: 8 ch. analog inputs (Resolution 10 bits or 8 bits)
• 16-bit reload timer * 2ch
• ICU (Input capture) 16bit * 8 ch
• OCU (Output capture) 16bit * 4ch
• 16-bit Programmable Pulse Generator 4ch
• External bus interface
• Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different
addressing modes; barrel shift; variety of pointers)
• 4-byte instruction execution queue
• signed multiply (16bit*16bit) and divide (32bit/16bit) instructions available
• Program Patch Function
• Fast Interrupt processing
• Low Power Consumption - 10 different power saving modes: (Sleep, Stop, CPU intermittent mode, Hardware
standby,...)
• Package: 100-pin plastic QFP
Controller Area Network (CAN) - License of Robert Bosch GmbH
2
MB90540/545 Series
s
PRODUCT LINEUP
The following table provides a quick outlook of the MB90540/545 Series
Features
MB90V540
MB90F543/F549
CPU
System clock
ROM
RAM
F
2
MC-16LX CPU
On-chip PLL clock multiplier (
×
1,
×
2,
×
3,
×
4, 1/2 when PLL stop)
Minimum instruction execution time: 62.5 ns (4 MHz osc. PLL
×
4)
External
8 Kbytes
Boot-block
Flash memory 128 K/256 Kbytes
6 Kbytes
Mask ROM 128 K/256 Kbytes
6 Kbytes
0.5
µm
CMOS with on-chip volt-
age regulator for internal power
supply
MB90543/549
Technology
0.5
µm
CMOS with on-chip volt-
0.5
µm
CMOS with on- age regulator for internal power
chip voltage regulator
supply + Flash memory On-chip
for internal power supply charge pump for programming
voltage
5 V±10 %
−
40 to 85
°C
PGA-256
Operating
voltage range
Temperature
range
Package
QFP100
UART0
Full duplex double buffer
Supports asynchronous/synchronous (with start/stop bit) transfer
Baud rate: 4808/5208/9615/10417/19230/38460/62500/500000 bps (asynchronous)
500K/1M/2Mbps (synchronous) at System clock = 16 MHz
Full duplex double buffer
Asynchronous (start-stop synchronized) and CLK-synchronous communication
Baud rate: 1202/2404/4808/9615/31250 bps (asynchronous)
62.5K/12K/250K/500K/1 Mbps (synchronous) at 6,8,10,12,16 MHz
Transfer can be started from MSB or LSB
Supports internal clock synchronized transfer and external clock synchronized transfer
Supports positive-edge and negative-edge clock synchronization
Baud rate : 31.25K/62.5K/125K/500K/1Mbps at System clock = 16MHz
10-bit or 8-bit resolution
8 input channels
Conversion time: 26.3
µs
(per one channel)
Operation clock frequency: fsys/2
1
, fsys/2
3
, fsys/2
5
(fsys = System clock frequency)
Supports External Event Count function
Signals an interrupt when overflow
Supports Timer Clear when a match with Output Compare(Channel 0)
Operation clock freq.: fsys/2
2
, fsys/2
4
, fsys/2
6
, fsys/2
8
(fsys = System clock freq.)
Signals an interrupt when a match with 16-bit IO Timer
Four 16-bit compare registers
A pair of compare registers can be used to generate an output signal
UART1(SCI)
Serial IO
A/D Converter
16-bit Reload
Timer
(2 channels)
16-bit IO Timer
16-bit
Output Compare
(4 channels)
(Continued)
3
MB90540/545 Series
(Continued)
Features
16-bit
Input Capture
(8 channels)
MB90V540
MB90F543/F549
MB90543/549
Rising edge, falling edge or rising & falling edge sensitive
Four 16-bit Capture registers
Signals an interrupt upon external event
Supports 8-bit and 16-bit operation modes
Eight 8-bit reload counters
Eight 8-bit reload registers for L pulse width
Eight 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as
8-bit prescaler plus 8-bit reload counter
4 output pins
Operation clock freq.: fsys, fsys/2
1
, fsys/2
2
, fsys/2
3
, fsys/2
4
or 128µs@fosc=4MHz
(fsys = System clock frequency, fosc = Oscillation clock frequency)
Conforms to CAN Specification Version 2.0 Part A and B
Automatic re-transmission in case of error
Automatic transmission responding to Remote Frame
Prioritized 16 message buffers for data and ID’s
Supports multiple messages
Flexible configuration of acceptance filtering:
Full bit compare / Full bit mask / Two partial bit masks
Supports up to 1Mbps
Sub-clock for low power operation
Can be programmed edge sensitive or level sensitive
Virtually all external pins can be used as general purpose IO
All push-pull outputs and schmitt trigger inputs
Bit-wise programmable as input/output or peripheral signal
Supports automatic programming,
Embedded Algorithm
TM
*
1
Write/Erase/Erase-Suspend/
Resume commands
A flag indicating completion of the
algorithm
Number of erase cycles: 10,000
times
Data retention time: 10 years
Flash Writer from Minato Electron-
ics Inc.
Boot block configuration
Erase can be performed on each
block
Block protection with external pro-
gramming voltage
Flash Security Feature:
protects the content of the
Flash memory
8/16-bit
Programmable
Pulse Generator
(4 channels)
CAN Interface
540 series:
2 channels
545 series:
1 channel
32 kHz Subclock
External Interrupt
(8 channels)
IO Ports
Flash Memory
*1: Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
4
MB90540/545 Series
s
PIN ASSIGNMENT
(Top view)
P14/AD12
P13/AD11
P12/AD10
P11/AD09
P10/AD08
P07/AD07
P06/AD06
P05/AD05
P04/AD04
P03/AD03
P02/AD02
P01/AD01
P17/AD15
P16/AD14
P15/AD13
P00/AD00
Vcc
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
P20/A16
P21/A17
P22/A18
P23/A19
P24/A20
P25/A21
P26/A22
P27/A23
P30/ALE
P31/RD
Vss
P32/WRL/WR
P33/WRH
P34/HRQ
P35/HAK
P36/RDY
P37/CLK
P40/SOT0
P41/SCK0
P42/SIN0
P43/SIN1
P44/SCK1
Vcc
P45/SOT1
P46/SOT2
P47/SCK2
C
P50/SIN2
P51/INT4
P52/INT5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
Vss
X1
X0
X0A
X1A
PA0
RST
P97/RX1
P96/TX1
P95/RX0
P94/TX0
P93/INT3
P92/INT2
P91/INT1
P90/INT0
P87/TOT1
P86/TIN1
P85/OUT1
P84/OUT0
P83/PPG3
P82/PPG2
P81/PPG1
P80/PPG0
P77/OUT3/IN7
P76/OUT2/IN6
P75/IN5
P74/IN4
P73/IN3
P72/IN2
P71/IN1
P70/IN0
HST
MD2
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
P57/TOT0
49
MD0
P55/ADTG
P60/AN0
P61/AN1
P62/AN2
P63/AN3
Vss
P64/AN4
P54/INT7
P65/AN5
AVR+
AVR-
AVcc
AVss
P66/AN6
P67/AN7
P53/INT6
(FPT-100P-M06)
P56/TIN0
MD1
50
5
