variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided (T
Jpk
)
v
150_C. At high case temperatures, thermal limitations
will reduce the power that can be handled to values less than
the limitations imposed by second breakdown.
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
− V
CE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
Figure 1. Active−Region Safe Operating Area
1000
700
500
hFE , DC CURRENT GAIN
300
200
100
70
50
30
20
T
J
= 150°C
25°C
−55
°C
1.5
V
CE
= 1.0 V
VOLTAGE (VOLTS)
1.2
T
J
= 25°C
0.9
V
BE(sat)
@ I
C
/I
B
= 10
0.6
V
BE
@ V
CE
= 2.0 V
0.3
V
CE(sat)
@ I
C
/I
B
= 10
10
2.0
3.0 5.0 10
20 30 50 100 200 300 500 1000 2000
I
C
, COLLECTOR CURRENT (mA)
0
2.0
3.0 5.0 10
20 30 50
100 200 300 500 1000 2000
I
C
, COLLECTOR CURRENT (mA)
Figure 2. DC Current Gain
Figure 3. “On” Voltage
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
0.7
0.5
0.3
0.2
D = 0.5
0.2
0.1
0.05
0.01
SINGLE PULSE
q
JC
(t) = r(t)
q
JC
q
JC
= 5.0°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
− T
C
= P
(pk)
q
JC
(t)
P
(pk)
0.1
0.07
0.05
0.03
0.02
0.01
0.01
t
1
t
2
DUTY CYCLE, D = t
1
/t
2
0.02 0.03
0.05
0.1
0.2
0.3
0.5
1.0
2.0 3.0 5.0
t, TIME (ms)
10
20
30
50
100
200 300
500
1000
Figure 4. Thermal Response
http://onsemi.com
3
MJE521
PACKAGE DIMENSIONS
TO−225
CASE 77−09
ISSUE Z
−B−
U
Q
F
M
C
−A−
1 2 3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 077−01 THRU −08 OBSOLETE, NEW STANDARD
077−09.
INCHES
MIN
MAX
0.425
0.435
0.295
0.305
0.095
0.105
0.020
0.026
0.115
0.130
0.094 BSC
0.050
0.095
0.015
0.025
0.575
0.655
5
_
TYP
0.148
0.158
0.045
0.065
0.025
0.035
0.145
0.155
0.040
−−−
MILLIMETERS
MIN
MAX
10.80
11.04
7.50
7.74
2.42
2.66
0.51
0.66
2.93
3.30
2.39 BSC
1.27
2.41
0.39
0.63
14.61
16.63
5
_
TYP
3.76
4.01
1.15
1.65
0.64
0.88
3.69
3.93
1.02
−−−
H
K
V
G
S
D
2 PL
0.25 (0.010)
M
J
R
0.25 (0.010)
A
M
M
A
M
B
M
B
M
DIM
A
B
C
D
F
G
H
J
K
M
Q
R
S
U
V
STYLE 1:
PIN 1. EMITTER
2. COLLECTOR
3. BASE
ON Semiconductor
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