MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMBT589LT1/D
High Current Surface Mount
PNP Silicon Switching Transistor
for Load Management
in Portable Applications
A Device of the
m
X
™
Family
1
BASE
2
EMITTER
COLLECTOR
3
MMBT589LT1
30 Volts
2.0 Amps
PNP Transistor
3
1
MAXIMUM RATINGS (TA = 25°C)
Rating
Collector – Emitter Voltage
Collector – Base Voltage
Emitter – Base Voltage
Collector Current — Continuous
Collector Current — Peak
Symbol
VCEO
VCBO
VEBO
IC
ICM
Max
–30
– 50
– 5.0
–1.0
–2.0
Unit
Vdc
Vdc
Vdc
Adc
A
2
CASE 318 – 08, STYLE 6
SOT23LF (TO – 236AB)
DEVICE MARKING
MMBT589LT1 = G3
THERMAL CHARACTERISTICS
Characteristic
Total Device Dissipation
TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation
TA = 25°C
Derate above 25°C
Thermal Resistance, Junction to Ambient
Total Device Dissipation
(Single Pulse < 10 sec.)
Junction and Storage Temperature
1. FR– 4 @ Minimum Pad
2. FR– 4 @ 1.0 X 1.0 inch Pad
3. ref: Figure 8
Symbol
PD (1)
Max
310
2.5
R
q
JA (1)
PD (2)
403
710
5.7
R
q
JA (2)
PDsingle (3)
575
TJ, Tstg
– 55 to +150
°C
176
Unit
mW
mW/°C
°C/W
mW
mW/°C
°C/W
mW
Thermal Clad is a trademark of the Bergquist Company
m
X
™:
MicroExecutive Family of High Performance Surface Mount Devices
Motorola Small–Signal Transistors, FETs and Diodes Device Data
©
Motorola, Inc. 1998
1
MMBT589LT1
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Collector – Emitter Breakdown Voltage
(IC = –10 mAdc, IB = 0)
Collector – Base Breakdown Voltage
(IC = –0.1 mAdc, IE = 0)
Emitter – Base Breakdown Voltage
(IE = –0.1 mAdc, IC = 0)
Collector Cutoff Current
(VCB = –30 Vdc, IE = 0)
Collector–Emitter Cutoff Current
(VCES = –30 Vdc)
Emitter Cutoff Current
(VEB = –4.0 Vdc)
V(BR)CEO
–30
V(BR)CBO
–50
V(BR)EBO
–5.0
ICBO
—
ICES
—
IEBO
—
–0.1
–0.1
–0.1
—
—
Vdc
—
Vdc
Vdc
m
Adc
m
Adc
m
Adc
ON CHARACTERISTICS
DC Current Gain (1) (Figure 1)
(IC = –1.0 mA, VCE = –2.0 V)
(IC = –500 mA, VCE = –2.0 V)
(IC = –1.0 A, VCE = –2.0 V)
(IC = 2.0 A, VCE = –2.0 V)
Collector – Emitter Saturation Voltage (1) (Figure 3)
(IC = –0.5 A, IB = –0.05 A)
(IC = –1.0 A, IB = 0.1 A)
(IC = –2.0 A, IB = –0.2 A)
Base – Emitter Saturation Voltage (1) (Figure 2)
(IC = –1.0 A, IB = –0.1 A)
Base – Emitter Turn–on Voltage (1)
(IC = –1.0 A, VCE = –2.0 V)
Cutoff Frequency
(IC = –100 mA, VCE = –5.0 V, f = 100 MHz)
Output Capacitance (f = 1.0 MHz)
1. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle
≤
2%
hFE
100
100
80
40
VCE(sat)
—
—
—
VBE(sat)
—
VBE(on)
—
fT
100
Cobo
—
—
15
pF
–1.1
MHz
–1.2
V
–0.25
–0.30
–0.65
V
—
300
—
—
V
2
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT589LT1
200
VCE = –2.0 V
h FE , DC CURRENT GAIN
h FE , DC CURRENT GAIN
150
230
210
190
170
150
130
110
90
70
0
0.001
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (AMPS)
50
1.0
10
100
1000
IC, COLLECTOR CURRENT (mA)
–55°C
25°C
125°C
VCE = –1.0 V
100
50
Figure 1. DC Current Gain versus
Collector Current
Figure 2. DC Current Gain versus
Collector Current
1.0
VBE(sat) , BASE EMITTER SATURATION
VOLTAGE (VOLTS)
0.9
0.8
V, VOLTAGE (VOLTS)
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
10
100
1000
IC, COLLECTOR CURRENT (mA)
VCE(sat)
VBE(sat)
VBE(on)
1.0
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
0.55
0.5
0.001
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (AMPS)
IC/IB = 100
IC/IB = 10
Figure 3. “On” Voltages
Figure 4. Base Emitter Saturation Voltage
versus Collector Current
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
VCE(sat), COLLECTOR EMITTER SATURATION
VOLTAGE (VOLTS)
1.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.001
0.01
0.1
1.0
10
IC, COLLECTOR CURRENT (AMPS)
IC/IB = 10
IC/IB = 100
0.8
0.6
1000 mA
0.4
100 mA
0.2
10 mA
0
0.01
0.1
1.0
10
100
1000
IB, BASE CURRENT (mA)
50 mA
Figure 5. Collector Emitter Saturation Voltage
versus Collector Current
Figure 6. Collector Emitter Saturation Voltage
versus Collector Current
Motorola Small–Signal Transistors, FETs and Diodes Device Data
3
MMBT589LT1
10
IC , COLLECTOR CURRENT (AMPS)
SINGLE PULSE TEST AT Tamb = 25°C
1s
1.0
100 ms
10 ms
1 ms
100
m
s
2s
0.1
0.01
0.1
1.0
10
VCE, COLLECTOR EMITTER VOLTAGE (VOLTS)
100
Figure 7. Safe Operating Area
0.5
1.0E+00
0.05
0.02
1.0E–01
Rthja , (t)
D = 0.01
0.2
0.1
1.0E–02
r(t)
1.0E–03
1E–05
0.0001
0.001
0.01
0.1
t, TIME (sec)
1.0
10
100
1000
Figure 8. Normalized Thermal Response
4
Motorola Small–Signal Transistors, FETs and Diodes Device Data
MMBT589LT1
INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to insure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self align when
subjected to a solder reflow process.
0.037
0.95
0.037
0.95
0.079
2.0
0.035
0.9
0.031
0.8
inches
mm
SOT–23
SOT–23 POWER DISSIPATION
The power dissipation of the SOT–23 is a function of the
pad size. This can vary from the minimum pad size for
soldering to a pad size given for maximum power dissipation.
Power dissipation for a surface mount device is determined
by TJ(max), the maximum rated junction temperature of the
die, R
θJA
, the thermal resistance from the device junction to
ambient, and the operating temperature, TA . Using the
values provided on the data sheet for the SOT–23 package,
PD can be calculated as follows:
PD =
TJ(max) – TA
R
θJA
SOLDERING PRECAUTIONS
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within a
short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
•
Always preheat the device.
•
The delta temperature between the preheat and
soldering should be 100°C or less.*
•
When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering method,
the difference shall be a maximum of 10°C.
•
The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
•
When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
•
After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and result
in latent failure due to mechanical stress.
•
Mechanical stress or shock should not be applied during
cooling.
* Soldering a device without preheating can cause excessive
thermal shock and stress which can result in damage to the
device.
The values for the equation are found in the maximum
ratings table on the data sheet. Substituting these values into
the equation for an ambient temperature TA of 25°C, one can
calculate the power dissipation of the device which in this
case is 225 milliwatts.
PD =
150°C – 25°C
556°C/W
= 225 milliwatts
The 556°C/W for the SOT–23 package assumes the use
of the recommended footprint on a glass epoxy printed circuit
board to achieve a power dissipation of 225 milliwatts. There
are other alternatives to achieving higher power dissipation
from the SOT–23 package. Another alternative would be to
use a ceramic substrate or an aluminum core board such as
Thermal Clad™. Using a board material such as Thermal
Clad, an aluminum core board, the power dissipation can be
doubled using the same footprint.
Motorola Small–Signal Transistors, FETs and Diodes Device Data
5
