Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5643L
Rev. 6, 03/2011
MPC5643L
MPC5643L Microcontroller
Data Sheet
MAPBGA–225
15 mm x 15 mm
QFN12
##_mm_x_##mm
SOT-343R
##_mm_x_##mm
144 LQFP
(20 x 20 mm)
TBD
PKG-TBD
## mm x ## mm
257 MAPBGA
(14 x 14 mm)
1
1
1.1
Introduction
Document overview
2
This document describes the features of the family and
options available within the family members, and highlights
important electrical and physical characteristics of the
devices.
This document provides electrical specifications, pin
assignments, and package diagrams for the MPC5643L series
of microcontroller units (MCUs). For functional
characteristics, see the
MPC5643L Microcontroller Reference
Manual.
For use of the MPC5643Lin a fail-safe system
according to safety standard IEC 61508, see the
Safety
Application Guide for MPC5643L.
The MPC5643L MCU series is available in two silicon
versions, or “cuts”. These are referred to as “cut1” and “cut2”
throughout this document. Functional differences between the
two cuts are clearly identified with the labels “cut1” and
“cut2”.
3
1.2
•
•
•
Description
Contain enhancements that improve the
architecture’s fit in embedded applications
Include additional instruction support for digital
signal processing (DSP)
Integrate technologies such as an enhanced time
processor unit, enhanced queued analog-to-digital
converter, Controller Area Network, and an
enhanced modular input-output system
4
5
6
The MPC5643L series microcontrollers are system-on-chip
devices that are built on Power Architecture technology and:
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Document overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.4 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Feature summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.6 Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . 22
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.2 Supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2.3 System pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.4 Pin muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
3.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 72
3.3 Recommended operating conditions . . . . . . . . . . . . . . 73
3.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 74
3.5 Electromagnetic Interference (EMI) characteristics
(cut1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.6 Electrostatic discharge (ESD) characteristics. . . . . . . . 77
3.7 Static latch-up (LU). . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.8 Voltage regulator electrical characteristics . . . . . . . . . . 78
3.9 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . 81
3.10 Supply current characteristics (cut2) . . . . . . . . . . . . . . 82
3.11 Temperature sensor electrical characteristics . . . . . . . 83
3.12 Main oscillator electrical characteristics . . . . . . . . . . . . 83
3.13 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . 85
3.14 16 MHz RC oscillator electrical characteristics . . . . . . 87
3.15 ADC electrical characteristics. . . . . . . . . . . . . . . . . . . . 87
3.16 Flash memory electrical characteristics . . . . . . . . . . . . 92
3.17 SWG electrical characteristics . . . . . . . . . . . . . . . . . . . 93
3.18 AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
3.19 Reset sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
3.20 AC timing characteristics . . . . . . . . . . . . . . . . . . . . . . 100
Package characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
4.1 Package mechanical data. . . . . . . . . . . . . . . . . . . . . . 112
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . 118
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2009–2011. All rights reserved.
Preliminary—Subject to Change Without Notice
Introduction
The MPC5643L family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It
belongs to an expanding range of automotive-focused products designed to address electrical hydraulic power steering (EHPS),
electric power steering (EPS) and airbag applications. The advanced and cost-efficient host processor core of the MPC5643L
automotive controller family complies with the Power Architecture embedded category. It operates at speeds as high as
120 MHz and offers high-performance processing optimized for low power consumption. It capitalizes on the available
development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and
configuration code to assist with users’ implementations.
1.3
Device comparison
Table 1. MPC5643L device summary
Feature
CPU
Type
Architecture
Execution speed
DMIPS intrinsic performance
SIMD (DSP + FPU)
MMU
Instruction set PPC
Instruction set VLE
Instruction cache
MPU-16 regions
Semaphore unit (SEMA4)
Buses
Core bus
Internal periphery bus
Crossbar
Memory
Master × slave ports
Code/data flash
Static RAM (SRAM)
Modules
Interrupt Controller (INTC)
Periodic Interrupt Timer (PIT)
System Timer Module (STM)
Software Watchdog Timer (SWT)
eDMA
FlexRay
FlexCAN
LINFlexD (UART and LIN with DMA support)
Clock out
Fault Collection and Control Unit (FCCU)
MPC5643L
2 × e200z4
(in lock-step or decoupled operation)
Harvard
0–120 MHz (+2% FM)
>240 MIPS
Yes
16 entry
Yes
Yes
4 KB, EDC
Yes, replicated module
Yes
AHB, 32-bit address, 64-bit data
32-bit address, 32-bit data
Lock Step Mode: 4 × 3
Decoupled Parallel Mode: 6 × 3
1 MB, ECC, RWW
128 KB, ECC
16 interrupt levels, replicated module
1 × 4 channels
1 × 4 channels, replicated module
Yes, replicated module
16 channels, replicated module
1 × 64 message buffers, dual channel
2 × 32 message buffers
2
Yes
Yes
MPC5643L Microcontroller Data Sheet, Rev. 6
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Introduction
Table 1. MPC5643L device summary (continued)
Feature
Modules
(cont.)
Cross Triggering Unit (CTU)
eTimer
FlexPWM
Analog-to-Digital Converter (ADC)
Sine Wave Generator (SWG)
Deserial Serial Peripheral Interface (DSPI)
Cyclic Redundancy Checker (CRC) unit
Junction temperature sensor (TSENS)
Digital I/Os
Supply
Device power supply
Analog reference voltage
Clocking
Frequency-modulated phase-locked loop (FMPLL)
Internal RC oscillator
External crystal oscillator
Debug
Packages
Nexus
Known Good Die (KGD)
LQFP
MAPBGA
Temperature
Temperature range (junction)
Ambient temperature range using external ballast
transistor (LQFP)
Ambient temperature range using external ballast
transistor (BGA)
1
2
MPC5643L
Yes
3 × 6 channels
1
2 Module 4 × (2 + 1) channels
2
2 × 12-bit ADC, 16 channels per ADC
(3 internal, 4 shared and 9 external)
32 point
3 × DSPI
as many as 8 chip selects
Yes
Yes, replicated module
16
3.3 V with integrated bypassable ballast transistor
External ballast transistor not needed for bare die
3.0 V – 3.6 V and 4.5 V – 5.5 V
2
16 MHz
4 – 40 MHz
Level 3+
Yes
144 pins
257 MAPBGA
–40 to 150
°
C
–40 to 125
°
C
TBD
The third eTimer is available only in the BGA package.
The second FlexPWM module is available only in the BGA package.
1.4
Block diagram
Figure 1
shows a top-level block diagram of the MPC5643L device.
MPC5643L Microcontroller Data Sheet, Rev. 6
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
3
Introduction
PMU
SWT
ECSM
STM
INTC
SEMA4
eDMA
e200z4
SPE
VLE
MMU
I-CACHE
JTAG
Nexus
e200z4
SPE
VLE
MMU
I-CACHE
PMU
SWT
ECSM
STM
INTC
SEMA4
eDMA
FlexRay
RC
Crossbar Switch
Memory Protection Unit
ECC logic for SRAM
Crossbar Switch
Memory Protection Unit
ECC logic for SRAM
PBRIDGE
RC
RC
PBRIDGE
TSENS
Flash memory
ECC bits + logic
RC
Secondary FMPLL
SRAM
ECC bits
TSENS
IRCOSC
FMPLL
SSCM
CMU
CMU
CMU
BAM
CRC
FlexPWM
FlexPWM
LINFlexD
LINFlexD
FlexCAN
FlexCAN
eTimer
eTimer
eTimer
DSPI
DSPI
DSPI
CTU
WakeUp
XOSC
SIUL
FCCU
ADC
ADC
PIT
SWG
MC
ADC
BAM
CMU
CRC
CTU
DSPI
ECC
ECSM
eDMA
FCCU
FlexCAN
FMPLL
INTC
IRCOSC
JTAG
– Analog-to-Digital Converter
– Boot Assist Module
– Clock Monitoring Unit
– Cyclic Redundancy Check unit
– Cross Triggering Unit
– Serial Peripherals Interface
– Error Correction Code
– Error Correction Status Module
– Enhanced Direct Memory Access controller
– Fault Collection and Control Unit
– Controller Area Network controller
– Frequency Modulated Phase Locked Loop
– Interrupt Controller
– Internal RC Oscillator
– Joint Test Action Group interface
LINFlexD
MC
PBRIDGE
PIT
PMU
RC
RTC
SEMA4
SIUL
SSCM
STM
SWG
SWT
TSENS
XOSC
– LIN controller with DMA support
– Mode Entry, Clock, Reset, & Power
– Peripheral bridge
– Periodic Interrupt Timer
– Power Management Unit
– Redundancy Checker
– Real Time Clock
– Semaphore Unit
– System Integration Unit Lite
– System Status and Configuration Module
– System Timer Module
– Sine Wave Generator
– Software Watchdog Timer
– Temperature Sensor
– Crystal Oscillator
Figure 1. MPC5643L block diagram
MPC5643L Microcontroller Data Sheet, Rev. 6
4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Introduction
1.5
•
Feature summary
High-performance e200z4d dual core
— 32-bit Power Architecture
®
technology CPU
— Core frequency as high as 120 MHz
— Dual issue five-stage pipeline core
— Variable Length Encoding (VLE)
— Memory Management Unit (MMU)
— 4 KB instruction cache with error detection code
— Signal processing engine (SPE)
Memory available
— 1 MB flash memory with ECC
— 128 KB on-chip SRAM with ECC
— Built-in RWW capabilities for EEPROM emulation
SIL3/ASILD innovative safety concept: LockStep mode and Fail-safe protection
— Sphere of replication (SoR) for key components (such as CPU core, eDMA, crossbar switch)
— Fault collection and control unit (FCCU)
— Redundancy control and checker unit (RCCU) on outputs of the SoR connected to FCCU
— Boot-time Built-In Self-Test for Memory (MBIST) and Logic (LBIST) triggered by hardware
— Boot-time Built-In Self-Test for ADC and flash memory triggered by software
— Replicated safety enhanced watchdog
— Replicated junction temperature sensor
— Non-maskable interrupt (NMI)
— 16-region memory protection unit (MPU)
— Clock monitoring units (CMU)
— Power management unit (PMU)
— Cyclic redundancy check (CRC) unit
Decoupled Parallel mode for high-performance use of replicated cores
Nexus Class 3+ interface
Interrupts
— Replicated 16-priority controller
— Replicated 16-channel eDMA controller
GPIOs individually programmable as input, output or special function
Three 6-channel general-purpose eTimer units
2 FlexPWM units
— Four 16-bit channels per module
Communications interfaces
— 2 LINFlexD channels
— 3 DSPI channels with automatic chip select generation
— 2 FlexCAN interfaces (2.0B Active) with 32 message objects
— FlexRay module (V2.1 Rev. A) with 2 channels, 64 message buffers and data rates up to 10 Mbit/s
Two 12-bit analog-to-digital converters (ADCs)
— 16 input channels
— Programmable cross triggering unit (CTU) to synchronize ADCs conversion with timer and PWM
Sine wave generator (D/A with low pass filter)
On-chip CAN/UART bootstrap loader
MPC5643L Microcontroller Data Sheet, Rev. 6
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Freescale Semiconductor
Preliminary—Subject to Change Without Notice
5
stm32/stm8
