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MIL-PRF-38534 CERTIFIED

M.S.KENNEDY CORP.

4707 Dey Road Liverpool, N.Y. 13088

600V ISOLATED

HALF BRIDGE

GATE DRIVER

4900

(315) 701-6751

FEATURES:

Floating Channels up to 600V

Up to 8 Amp Peak Source and Sink Current

De-Saturation Protection/Shutdown

Individual ON, OFF and Soft Shutdown Pins for Each IGBT Gate

Undervoltage Lockout

Simultaneous Conduction Lockout

Contact MSK for MIL-PRF-38534 Qualification Status

DESCRIPTION:

The MSK 4900 is a complete isolated half bridge gate driver hybrid capable of working to 600V channel isolation and 8

amps peak turn-on and turn-off current. Housed in an isolated, convenient bolt-down hermetic package, the MSK 4900

houses the entire isolated DC-DC converter circuitry and opto-isolators for logic signals. The input logic prevents simulta-

neous conduction by locking out both high side and low side drives in case both inputs are asserted ON at the same time.

Each gate drive is capable of sourcing and sinking up to 8 amps peak current. The turn-on and turn-off pins are separate to

allow separate gate current control. Upon detection of a de-saturation condition, a FAULT is presented and the transistor is

shutdown by a separate controlled shutdown pin. The FAULT will have to be cleared before normal operation will begin

again. The MSK 4900 has good thermal conductivity due to an isolated substrate/package design that allows direct heat

sinking of the device without insulators.

EQUIVALENT SCHEMATIC

TYPICAL APPLICATIONS

Inverter Bridge Gate Drive

Motor Control Gate Drive Bridge

PIN-OUT INFORMATION

TBD

PRELIMINARY

Rev. -

1/07

ABSOLUTE MAXIMUM RATINGS

High Voltage Isolation

Logic Input Voltage

Vcc Supply

Continuous Output Current

Peak Ouput Current

Thermal Resistance

(output drivers - junction to case)

○

ELECTRICAL SPECIFICATIONS

All Ratings: Tc=+25°C Unless Otherwise Specified

Parameter

Vcc SUPPLY CHARACTERISTICS

Vcc Voltage

Vcc Current

INPUT/OUTPUT LOGIC

Positive Trigger Input Voltage

Negative Trigger Input Voltage

Open Collector Ouput - VOL

Open Collector Ouput - IOL

OUTPUT CHARACTERISTICS - GATE DRIVE

VOH

VOL

IOH

IOL

ISD

tplh - Propagation Delay Time

tphl - Propagation Delay Time

tr - Rise Time

tf - Fall Time

td - De-Sat Delay Time

De-Sat Trip Voltage

=0.33µF, 20KHz pulse

14.25

-5.75

TBD

15.0

-5.0

TBD

15.75

-4.25

TBD

14.25

-5.75

TBD

15.0

-5.0

TBD

15.75

-4.25

TBD

µS

=1.5mA

2.0

0.15

0.8

0.4

1.5

2.0

0.15

0.8

0.4

1.5

=0.33µF, 20KHz pulse

14.25

TBD

15.00

TBD

15.75

TBD

14.25

TBD

15.00

TBD

15.75

TBD

Test Conditions

Group A

Subgroup

MSK 4900H/E

Min.

Typ.

Max.

Min.

MSK 4900

Typ.

Max.

NOTES:

Guaranteed by design but not tested. Typical parameters are representative of actual device

performance but are for reference only.

Industrial grade and "E" suffix devices shall be tested to subgroups 1 and 4 unless otherwise specified.

Military grade devices ("H" Suffix) shall be 100% tested to Subgroups 1, 2, 3 and 4.

Subgroups 5 and 6 testing available upon request.

Subgroup 1, 4 T

= T

= +25°C

2, 5 T

= T

= +125°C

3, 6 T

= T

= -55°C

Continuous operation at or above absolute maximum ratings may adversly effect the device

performance and/or life cycle.

PRELIMINARY

Rev. - 1/07

○

TBD

-40°C to +85°C

-55°C to +125°C

+150°C

○

600V

5.5V

18V

TBD

○

Storage Temperature Range

Lead Temperature Range

(10 Seconds)

Case Operating Temperature

MSK4900

MSK4900H/E

Junction Temperature

-65°C to +150°C

+300°C

○

Units

APPLICATION NOTES

MSK 4900 PIN DESCRIPTIONS

VCC -

is the bias supply voltage for supplying the input logic

and the power supply for the isolated output. This pin should

be bypassed to GND with a 4.7µF tantalum capacitor and a

0.1µF ceramic capacitor as close this pin and GND as pos-

sible.

X OFF -

is the gate drive output pin for turning the gate off.

This pin will sink TBD current. A separate gate resistor shall

be selected to tailor the turn-off characteristics. This pin will

turn off to -5V.

GND -

is the Vcc supply return for the input logic and the

internal isolated supply. This GND is completely isolated from

the output section. No output returns should connect to this

GND in order to preserve isolation. All Vcc bias supply by-

pass connections should be made as close to this pin as pos-

sible. An input ground plane is the most preferred layout for

assuring good, low impedance ground, shielding of inputs

from noise, etc.

DE-SAT SENSE X -

is the input connection for sensing de-

saturation. This pin shall be connected to the collector of the

IGBT. This pin is blanked during switching so that it will not

false trip.

X VDD -

is the pin for the floating gate supply voltage. TBD

capacitance shall be connected between this pin and X VSS

as close to the pin as possible. Nominally, this voltage will be

+15V with respect to the RETURN X pin and the emitter of

the IGBT.

HI -

is the input logic pin for commanding the high-side gate

drive to turn on. This logic input is TTL compatible. This in-

put is exclusive OR'd with LO to protect against simultaneous

turn on of both the high-side and low-side gate drive.

X VSS -

is the return pin for the floating gate supply voltage.

TBD capacitance shall be connected between this pin and X

VDD as close to the pins as possible. Nominally, this voltage

will be -5V with respect to the RETURN X pin and the emitter.

LO -

is the input logic pin for commanding the low-side gate

drive to turn on. This logic input is TTL compatible. This in-

put is exclusive OR'd with HI to protect against simultaneous

turn on of both the high-side and low-side gate drive.

X FAULT -

is an open collector output for indicating either a

de-saturation condition or an undervoltage condition for the

gate drive. This output will be cleared upon activation of

X FAULT CLEAR.

SS X -

is the soft shutdown pin for slowly turning the gate

off after a de-saturation condition. This pin is a separate gate

turn-off path and requires a separate gate resistor for this spe-

cial turn-off approach. The resistor should be sized to keep di/

dt from being too high after the de-sat condition.

RETURN X -

is the pin for the emitter reference. This pin will

be at zero volts to +15V to -5V for the gate drive voltage.

X FAULT CLEAR -

is a logic input pin for clearing a FAULT

condition. This input should not be activated until shutdown

of the affected gate is complete. Allow (TBD) µSec after FAULT

before activation of this pin.

X ON -

is the gate drive output pin for turning the gate on.

This pin will source TBD current. A separate gate resistor shall

be selected to tailor the turn-on characteristics. This pin will

turn on to +15V.

NOTE: X = HI or LO

PRELIMINARY

Rev. - 1/07

TYPICAL APPLICATION

TBD

PRELIMINARY

Rev. - 1/07

MSK4900 TEST CIRCUIT

TBD

PRELIMINARY

Rev. - 1/07