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NP100P04PDG-E1-AY

Power Field-Effect Transistor, 100A I(D), 40V, 0.0051ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, MP-25ZP, TO-263, 3 PIN

器件类别:分立半导体    晶体管   

厂商名称:NEC(日电)

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NEC(日电)
零件包装代码
D2PAK
包装说明
SMALL OUTLINE, R-PSSO-G2
针数
4
Reach Compliance Code
compliant
ECCN代码
EAR99
雪崩能效等级(Eas)
550 mJ
外壳连接
DRAIN
配置
SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压
40 V
最大漏极电流 (ID)
100 A
最大漏源导通电阻
0.0051 Ω
FET 技术
METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码
TO-263AB
JESD-30 代码
R-PSSO-G2
JESD-609代码
e3
元件数量
1
端子数量
2
工作模式
ENHANCEMENT MODE
封装主体材料
PLASTIC/EPOXY
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
NOT SPECIFIED
极性/信道类型
P-CHANNEL
最大脉冲漏极电流 (IDM)
300 A
认证状态
Not Qualified
表面贴装
YES
端子面层
MATTE TIN
端子形式
GULL WING
端子位置
SINGLE
处于峰值回流温度下的最长时间
NOT SPECIFIED
晶体管应用
SWITCHING
晶体管元件材料
SILICON
文档预览
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
NP100P04PDG
SWITCHING
P-CHANNEL POWER MOSFET
DESCRIPTION
The NP100P04PDG is P-channel MOS Field Effect Transistor designed for high current switching applications.
<R>
ORDERING INFORMATION
PART NUMBER
NP100P04PDG-E1-AY
NP100P04PDG-E2-AY
Note
Note
LEAD PLATING
Pure Sn (Tin)
PACKING
Tape 800 p/reel
PACKAGE
TO-263 (MP-25ZP)
Note
Pb-free (This product does not contain Pb in external electrode.)
FEATURES
Super low on-state resistance
R
DS(on)1
= 3.5 mΩ MAX. (V
GS
=
−10
V, I
D
=
−50
A)
R
DS(on)2
= 5.1 mΩ MAX. (V
GS
=
−4.5
V, I
D
=
−50
A)
High current rating: I
D(DC)
=
m100
A
(TO-263)
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C)
Drain to Source Voltage (V
GS
= 0 V)
Gate to Source Voltage (V
DS
= 0 V)
Drain Current (DC) (T
C
= 25°C)
Drain Current (pulse)
Note1
V
DSS
V
GSS
I
D(DC)
I
D(pulse)
P
T1
P
T2
T
ch
T
stg
−40
m20
m100
m300
200
1.8
175
−55
to
+175
74
550
V
V
A
A
W
W
°C
°C
A
mJ
Total Power Dissipation (T
C
= 25°C)
Total Power Dissipation (T
A
= 25°C)
Channel Temperature
Storage Temperature
Single Avalanche Current
Single Avalanche Energy
Note2
Note2
I
AS
E
AS
Notes 1.
PW
10
μ
s, Duty Cycle
1%
2.
Starting T
ch
= 25°C, V
DD
=
−30
V, R
G
= 25
Ω,
V
GS
=
−20 →
0 V
THERMAL RESISTANCE
Channel to Case Thermal Resistance
Channel to Ambient Thermal Resistance
R
th(ch-C)
R
th(ch-A)
0.75
83.3
°C/W
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. D18692EJ3V0DS00 (3rd edition)
Date Published May 2007 NS CP(K)
Printed in Japan
2007
The mark <R> shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
NP100P04PDG
ELECTRICAL CHARACTERISTICS (T
A
= 25°C)
CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate Leakage Current
Gate to Source Threshold Voltage
Forward Transfer Admittance
Note
Note
SYMBOL
I
DSS
I
GSS
V
GS(th)
| y
fs
|
R
DS(on)1
R
DS(on)2
TEST CONDITIONS
V
DS
=
−40
V, V
GS
= 0 V
V
GS
=
m20
V, V
DS
= 0 V
V
DS
=
−10
V, I
D
=
−1
mA
V
DS
=
−10
V, I
D
=
−50
A
V
GS
=
−10
V, I
D
=
−50
A
V
GS
=
−4.5
V, I
D
=
−50
A
V
DS
=
−10
V,
V
GS
= 0 V,
f = 1 MHz
V
DD
=
−20
V, I
D
=
−45
A,
V
GS
=
−10
V,
R
G
= 0
Ω
MIN.
TYP.
MAX.
−10
m100
UNIT
μ
A
nA
V
S
−1.0
43
−1.6
88
2.8
3.4
15100
2400
1130
38
30
300
100
−2.5
Drain to Source On-state Resistance
3.5
5.1
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
Body Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Note
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
G
Q
GS
Q
GD
V
F(S-D)
t
rr
Q
rr
V
DD
=
−32
V,
V
GS
=
−10
V,
I
D
=
−100
A
I
F
=
−100
A, V
GS
= 0 V
I
F
=
−100
A, V
GS
= 0 V,
di/dt =
−100
A/
μ
s
320
37
85
0.91
70
123
1.5
V
ns
nC
Note
Pulsed test PW
350
μ
s, Duty Cycle
2%
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
R
G
= 25
Ω
PG.
V
GS
=
−20 →
0 V
I
D
V
DD
50
Ω
L
V
DD
PG.
BV
DSS
V
DS
V
GS
(−)
0
τ
Starting T
ch
τ
= 1
μ
s
Duty Cycle
1%
V
DS
Wave Form
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
R
L
R
G
V
DD
V
DS
(−)
90%
10% 10%
90%
V
GS
(−)
V
GS
Wave Form
0
10%
V
GS
90%
I
AS
V
DS
0
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
I
G
=
−2
mA
PG.
50
Ω
R
L
V
DD
2
Data Sheet D18692EJ3V0DS
NP100P04PDG
TYPICAL CHARACTERISTICS (T
A
= 25°C)
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Percentage of Rated Power - %
120
100
80
60
40
20
0
0
25
50
75
100 125 150 175 200
240
TOTAL POWER DISSIPATION vs.
CASE TEMPERATURE
P
T
- Total Power Dissipation - W
200
160
120
80
40
0
0
25
50
75
100 125 150 175 200
T
ch
- Channel Temperature -
°C
FORWARD BIAS SAFE OPERATING AREA
T
C
- Case Temperature -
°C
-1000
I
D(pulse)
PW
=1
i
I
D
- Drain Current - A
-100
00
μ
s
1
i
I
D(DC)
R
DS(on)
Limited
(V
GS
=
−10
V)
m
DC
w
Po
i
s
1
i
0
ms
i
-10
D
er
ip
i ss
io
at
-1
T
C
= 25°C
Single Pulse
d
it e
im
nL
-0.1
-0.1
-1
-10
-100
V
DS
- Drain to Source Voltage - V
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
r
th(t)
- Transient Thermal Resistance -
°C/W
1000
100
10
1
R
th(ch-C)
= 0.75°C/Wi
0.1
0.01
Single Pulse
0.001
1m
10 m
100 m
1
10
100
1000
PW - Pulse Width - s
R
th(ch-A)
= 83.3°C/Wi
Data Sheet D18692EJ3V0DS
3
NP100P04PDG
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
FORWARD TRANSFER CHARACTERISTICS
-300
-250
I
D
- Drain Current - A
-1000
V
GS
=
−10
V
I
D
- Drain Current - A
-100
−4.5
V
-10
-1
-0.1
-0.01
Pulsed
-0.001
V
DS
=
−10
V
Pulsed
-200
-150
-100
-50
0
0
-0.5
T
ch
=
−55°C
−25°C
25°C
75°C
125°C
150°C
175°C
0
-1
-2
-3
-4
-5
-1
-1.5
-2
V
DS
- Drain to Source Voltage - V
GATE TO SOURCE THRESHOLD VOLTAGE vs.
CHANNEL TEMPERATURE
V
GS(th)
- Gate to Source Threshold Voltage - V
| y
fs
| - Forward Transfer Admittance - S
V
GS
- Gate to Source Voltage - V
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
-3
-2.5
-2
-1.5
-1
-0.5
0
-75
-25
25
75
125
175
225
T
ch
- Channel Temperature -
°C
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
DRAIN CURRENT
1000
100
125°C
150°C
175°C
T
ch
=
−55°C
−25°C
25°C
75°C
10
1
V
DS
=
−10
V
Pulsed
0.1
-0.1
-1
V
DS
=
−10
V
I
D
=
−1
mA
-10
-100
-1000
I
D
- Drain Current - A
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
R
DS(on)
- Drain to Source On-state Resistance - mΩ
6
5
4
3
2
1
Pulsed
0
-1
-10
-100
-1000
I
D
- Drain Current - A
10
8
6
4
2
Pulsed
0
0
-5
-10
-15
-20
V
GS
- Gate to Source Voltage - V
V
GS
=
−4.5
V
I
D
=
−100
A
−50
A
−20
A
−10
V
4
Data Sheet D18692EJ3V0DS
NP100P04PDG
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
R
DS(on)
- Drain to Source On-state Resistance - mΩ
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
8
C
iss
, C
oss
, C
rss
- Capacitance - pF
100000
C
iss
10000
C
oss
6
V
GS
=
−4.5
V
4
−10
V
2
I
D
=
−50
A
Pulsed
0
-75
-25
25
75
125
175
225
T
ch
- Channel Temperature -
°C
SWITCHING CHARACTERISTICS
10000
1000
V
GS
= 0 V
f = 1 MHz
100
-0.1
-1
C
rss
-10
-100
V
DS
- Drain to Source Voltage - V
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
-40
-12
V
DD
=
−32
V
−20
V
−8
V
1000
V
DS
- Drain to Source Voltage - V
t
d(on)
, t
r
, t
d(off)
, t
f
- Switching Time - ns
t
d(off)
t
f
t
d(on)
t
r
-30
-9
100
-20
V
GS
-10
V
DS
I
D
=
−100
A
0
0
50
100
150
200
250
300
-6
10
1
-0.1
V
DD
=
−20
V
V
GS
=
−10
V
R
G
= 0
Ω
-1
-10
-100
-1000
-3
0
350
I
D
- Drain Current - A
Q
G
- Gate Charge - nC
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
-1000
-100
-10
-1
-0.1
Pulsed
-0.01
0
0.5
1
1.5
V
GS
=
−10
V
0V
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
1000
t
rr
- Reverse Recovery Time - ns
I
F
- Diode Forward Current - A
100
10
di/dt =
−100
A/μs
V
GS
= 0 V
1
-0.1
-1
-10
-100
V
F(S-D)
- Source to Drain Voltage - V
I
F
- Diode Forward Current - A
Data Sheet D18692EJ3V0DS
5
V
GS
- Gate to Source Voltage - V
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