Dual/Quad Rail-to-Rail
Operational Amplifiers
OP295/OP495
FEATURES
Rail-to-rail output swing
Single-supply operation: 3 V to 36 V
Low offset voltage: 300 μV
Gain bandwidth product: 75 kHz
High open-loop gain: 1000 V/mV
Unity-gain stable
Low supply current/per amplifier: 150 μA maximum
PIN CONFIGURATIONS
OUT A
–IN A
+IN A
V–
1
2
3
4
8
V+
OUT B
00331-001
00331-004
TOP VIEW
(Not to Scale)
OP295
7
6
5
–IN B
+IN B
Figure 1. 8-Lead Narrow-Body SOIC_N
S Suffix (R-8)
APPLICATIONS
Battery-operated instrumentation
Servo amplifiers
Actuator drives
Sensor conditioners
Power supply control
OUT A
–IN A
+IN A
V–
1
2
3
4
OP295
8
7
6
5
V+
OUT B
00331-002
00331-003
–IN B
+IN B
Figure 2. 8-Lead PDIP
P Suffix (N-8)
GENERAL DESCRIPTION
Rail-to-rail output swing combined with dc accuracy are the
key features of the OP495 quad and OP295 dual CBCMOS
operational amplifiers. By using a bipolar front end, lower noise
and higher accuracy than those of CMOS designs have been
achieved. Both input and output ranges include the negative
supply, providing the user with zero-in/zero-out capability. For
users of 3.3 V systems such as lithium batteries, the OP295/OP495
are specified for 3 V operation.
Maximum offset voltage is specified at 300 μV for 5 V operation,
and the open-loop gain is a minimum of 1000 V/mV. This yields
performance that can be used to implement high accuracy systems,
even in single-supply designs.
The ability to swing rail-to-rail and supply 15 mA to the load
makes the OP295/OP495 ideal drivers for power transistors and
H bridges. This allows designs to achieve higher efficiencies and
to transfer more power to the load than previously possible
without the use of discrete components.
For applications such as transformers that require driving
inductive loads, increases in efficiency are also possible.
Stability while driving capacitive loads is another benefit of this
design over CMOS rail-to-rail amplifiers. This is useful for
driving coax cable or large FET transistors. The OP295/OP495
are stable with loads in excess of 300 pF.
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
1
2
3
4
5
6
7
14
13
12
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
OP495
11
10
9
8
Figure 3. 14-Lead PDIP
P Suffix (N-14)
OUT A
–IN A
+IN A
V+
+IN B
–IN B
OUT B
NC
1
2
3
4
5
6
7
8
16
15
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
NC
TOP VIEW
(Not to Scale)
OP495
14
13
12
11
10
9
NC = NO CONNECT
Figure 4. 16-Lead SOIC_W
S Suffix (RW-16)
The OP295 and OP495 are specified over the extended indus-
trial (−40°C to +125°C) temperature range. The OP295 is
available in 8-lead PDIP and 8-lead SOIC_N surface-mount
packages. The OP495 is available in 14-lead PDIP and 16-lead
SOIC_W surface-mount packages.
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
OP295/OP495
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Typical Performance Characteristics ............................................. 6
Applications ....................................................................................... 9
Rail-to-Rail Application Information ........................................ 9
Low Drop-Out Reference ............................................................ 9
Low Noise, Single-Supply Preamplifier ..................................... 9
Driving Heavy Loads ................................................................. 10
Direct Access Arrangement ...................................................... 10
Single-Supply Instrumentation Amplifier .............................. 10
Single-Supply RTD Thermometer Amplifier ......................... 11
Cold Junction Compensated, Battery-Powered
Thermocouple Amplifier .......................................................... 11
5 V Only, 12-Bit DAC That Swings 0 V to 4.095 V.................... 11
4 mA to 20 mA Current-Loop Transmitter ............................ 12
3 V Low Dropout Linear Voltage Regulator ............................. 12
Low Dropout, 500 mA Voltage Regulator with Foldback
Current Limiting ........................................................................ 12
Square Wave Oscillator .............................................................. 13
Single-Supply Differential Speaker Driver .............................. 13
High Accuracy, Single-Supply, Low Power Comparator ...... 13
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 16
REVISION HISTORY
8/09—Rev. F to Rev. G
Added Figure 18................................................................................ 8
Updated Outline Dimensions ....................................................... 17
3/08—Rev. E to Rev. F
Changes to Offset Voltage Unit in Table 1 .................................... 3
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 16
5/06—Rev. D to Rev. E
Updated Format .................................................................. Universal
Changes to Features.......................................................................... 1
Changes to Pin Connections ........................................................... 1
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 15
2/04—Rev. C to Rev. D
Changes to General Description .................................................... 1
Changes to Specifications ................................................................ 2
Changes to Absolute Maximum Ratings ....................................... 4
Changes to Ordering Guide ............................................................ 4
Updated Outline Dimensions ....................................................... 12
3/02—Rev. B to Rev. C
Figure changes to Pin Connections ................................................1
Deleted OP295GBC and OP495GBC from Ordering Guide ......3
Deleted Wafer Test Limits Table ......................................................3
Changes to Absolute Maximum Ratings ........................................4
Deleted Dice Characteristics ............................................................4
Rev. G | Page 2 of 16
OP295/OP495
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
V
S
= 5.0 V, V
CM
= 2.5 V, T
A
= 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage Swing High
Symbol
V
OS
−40°C ≤ T
A
≤ +125°C
I
B
−40°C ≤ T
A
≤ +125°C
I
OS
−40°C ≤ T
A
≤ +125°C
V
CM
CMRR
A
VO
ΔV
OS
/ΔT
V
OH
R
L
= 100 kΩ to GND
R
L
= 10 kΩ to GND
I
OUT
= 1 mA, −40°C ≤ T
A
≤ +125°C
R
L
= 100 kΩ to GND
R
L
= 10 kΩ to GND
I
OUT
= 1 mA, −40°C ≤ T
A
≤ +125°C
4.98
4.90
0 V ≤ V
CM
≤ 4.0 V, −40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ, 0.005 ≤ V
OUT
≤ 4.0 V
R
L
= 10 kΩ, −40°C ≤ T
A
≤ +125°C
0
90
1000
500
110
10,000
1
5.0
4.94
4.7
0.7
0.7
90
±18
110
150
0.03
75
86
1.5
51
<0.1
5
±1
8
Conditions
Min
Typ
30
Max
300
800
20
30
±3
±5
4.0
Unit
μV
μV
nA
nA
nA
nA
V
dB
V/mV
V/mV
μV/°C
V
V
V
mV
mV
mV
mA
dB
dB
μA
V/μs
kHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
Output Voltage Swing Low
V
OL
2
2
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
I
OUT
PSRR
I
SY
SR
GBP
θ
O
e
n
p-p
e
n
i
n
±1.5 V ≤ V
S
≤ ±15 V
±1.5 V ≤ V
S
≤ ±15 V, –40°C ≤ T
A
≤ +125°C
V
OUT
= 2.5 V, R
L
= ∞, −40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ
±11
90
85
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
V
S
= 3.0 V, V
CM
= 1.5 V, T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ration
Large Signal Voltage Gain
Offset Voltage Drift
Symbol
V
OS
I
B
I
OS
V
CM
CMRR
A
VO
∆V
OS
/∆T
Conditions
Min
Typ
100
8
±1
0 V ≤ V
CM
≤ 2.0 V, −40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ
0
90
110
750
1
Max
500
20
±3
2.0
Unit
μV
nA
nA
V
dB
V/mV
μV/°C
Rev. G | Page 3 of 16
OP295/OP495
Parameter
OUTPUT CHARACTERISTICS
Output Voltage Swing High
Output Voltage Swing Low
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Symbol
V
OH
V
OL
PSRR
I
SY
SR
GBP
θ
O
e
n
p-p
e
n
i
n
Conditions
R
L
= 10 kΩ to GND
R
L
= 10 kΩ to GND
±1.5 V ≤ V
S
≤ ±15 V
±1.5 V ≤ V
S
≤ ±15 V, −40°C ≤ T
A
≤ +125°C
V
OUT
= 1.5 V, R
L
= ∞, −40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ
Min
2.9
0.7
90
85
110
150
0.03
75
85
1.6
53
<0.1
2
Typ
Max
Unit
V
mV
dB
dB
μA
V/μs
kHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
V
S
= ±15.0 V, T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
Offset Voltage Drift
OUTPUT CHARACTERISTICS
Output Voltage Swing High
Output Voltage Swing Low
Output Current
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
Supply Voltage Range
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Phase Margin
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
Symbol
V
OS
I
B
I
OS
V
CM
CMRR
A
VO
ΔV
OS
/ΔT
V
OH
V
OL
I
OUT
PSRR
I
SY
V
S
SR
GBP
θ
O
e
n
p-p
e
n
i
n
V
S
= ±1.5 V to ±15 V
V
S
= ±1.5 V to ±15 V, −40°C ≤ T
A
≤ +125°C
V
O
= 0 V, R
L
= ∞, V
S
= ±18 V, −40°C ≤ T
A
≤ +125°C
−40°C ≤ T
A
≤ +125°C
V
CM
= 0 V
V
CM
= 0 V, −40°C ≤ T
A
≤ +125°C
V
CM
= 0 V
V
CM
= 0 V, −40°C ≤ T
A
≤ +125°C
−15.0 V ≤ V
CM
≤ +13.5 V, −40°C ≤ T
A
≤ +125°C
R
L
= 10 kΩ
−15
90
1000
Conditions
Min
Typ
300
7
±1
Max
500
800
20
30
±3
±5
+13.5
Unit
μV
μV
nA
nA
nA
nA
V
dB
V/mV
μV/°C
V
V
V
V
mA
dB
dB
μA
V
V/μs
kHz
Degrees
μV p-p
nV/√Hz
pA/√Hz
110
4000
1
R
L
= 100 kΩ to GND
R
L
= 10 kΩ to GND
R
L
= 100 kΩ to GND
R
L
= 10 kΩ to GND
14.95
14.80
−14.95
−14.85
±15
90
85
3 (± 1.5)
±25
110
175
36 (± 18)
0.03
85
83
1.25
45
<0.1
R
L
= 10 kΩ
0.1 Hz to 10 Hz
f = 1 kHz
f = 1 kHz
Rev. G | Page 4 of 16
OP295/OP495
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
1
Supply Voltage
Input Voltage
Differential Input Voltage
2
Output Short-Circuit Duration
Storage Temperature Range
P, S Packages
Operating Temperature Range
OP295G, OP495G
Junction Temperature Range
P, S Packages
Lead Temperature (Soldering, 60 sec)
1
2
THERMAL RESISTANCE
Rating
±18 V
±18 V
36 V
Indefinite
−65°C to +150°C
–40°C to +125°C
–65°C to +150°C
300°C
θ
JA
is specified for worst case mounting conditions; that is, θ
JA
is specified for device in socket for PDIP; θ
JA
is specified for
device soldered to printed circuit board for SOIC package.
Table 5. Thermal Resistance
Package Type
8-Lead PDIP (N-8)
8-Lead SOIC_N (R-8)
14-Lead PDIP (N-14)
16-Lead SOIC_W (RW-16)
θ
JA
103
158
83
98
θ
JC
43
43
39
30
Unit
°C/W
°C/W
°C/W
°C/W
ESD CAUTION
Absolute maximum ratings apply to packaged parts, unless otherwise noted.
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. G | Page 5 of 16
