October 2003
rev E
High Frequency LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation
Provides up to 20 dB of EMI suppression
Generates a low EMI spread spectrum clock of
the input frequency
40 MHz to 166 MHz input frequency range
Optimized for SVGA, XGA and high resolution
SXGA and UXGA LCD panels
Internal loop filter minimizes external
components and board space
2 selectable spreading options
SSON# control pin for spread spectrum enable
and disable options
2 selectable modulation rates
Low cycle-to-cycle jitter
3.3V operating range 16 mA output drives
16 mA output drives
TTL or CMOS compatible outputs
Low power CMOS design
Supports most mobile graphic accelerator
specifications
Available in 8 pin SOIC and TSSOP
Product Description
The P2160 is a selectable spread spectrum
frequency modulator designed compared to the
Block Diagram
P2160
typical narrow band signal produced by oscillators
and most frequency generators. Lowering EMI by
increasing a signal’s bandwidth is called “spread
spectrum clock generation” reducing the number of
circuit board layers and shielding that are traditionally
required to pass EMI regulations.
The P2160 uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all-digital method.
The P2160 modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized
clock and, more importantly, decreases the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillators
and most frequency generators. Lowering EMI by
increasing a signal’s bandwidth is called “spread
spectrum clock generation”.
Applications
The P2160 is targeted towards digital flat panel
applications for Notebook PCs, Palm-size PCs, Office
Automation Equipments, and LCD Monitors, Digital
Still Cameras and GPS Devices.
Alliance Semiconductor
2575, Augustine Drive
•
Santa Clara, CA
•
Tel: 408.855.4900
•
Fax: 408.855.4999
•
www.alsc.com
Notice: The information in this document is subject to change without notice.
October 2003
rev E
Pin Configuration
P2160
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
CLKIN
FSO
MRA
VSS
SSON#
ModOUT
SRO
VDD
Type
I
I
I
P
I
O
I
P
Description
External reference frequency input. Connect to externally generated
reference signal. Select appropriate frequency range for the intended input
frequency (see Table ‘Modulation Selection’)
Digital logic input used to select Frequency Range (see Table 1). This pin
has an internal pull-up resistor.
Digital logic input used to select Modulation Rate (see Table 1). This pin
has an internal pull-up resistor.
Ground Connection. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active Low).
Spread Spectrum function enable when low. This pin has an internal pull-
low resistor.
Spread Spectrum Clock Output.
Digital logic input used to select Spreading Range (see Table 1). This pin
has an internal pull-up resistor.
Connect to +3.3V
High Frequency LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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October 2003
rev E
Table-1 Modulation Selection
FS0
0
0
0
0
1
1
1
1
MRA
0
0
1
1
0
0
1
1
SR0
0
1
0
1
0
1
0
1
Frequency Range
40-80MHz
40-80MHz
40-80MHz
40-80MHz
80-166MHz
80-166MHz
80-166MHz
80-166MHz
Spread Range
+/- 0.5%
+/- 1.0%
+/- 0.5%
+/- 1.0%
+/- 0.5%
+/- 1.00%
+/- 0.5%
+/- 1.00%
P2160
Modulation Rate
(Fin/40) * 34.72 KHz
(Fin/40) * 34.72 KHz
(Fin/40) * 20.83 KHz
(Fin/40) * 20.83 KHz
(Fin/80) * 34.72 KHz
(Fin/80) * 34.72 KHz
(Fin/80) * 20.83 KHz
(Fin/80) * 20.83 KHz
Spread Spectrum Selection
Table 1 illustrates the possible spread spectrum options. The optimal setting should minimize system EMI to the
fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency (Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1).
Example: P2160 is designed for high-resolution flat panel applications and is able to support UXGA (1600 X
1200) flat panel that operates on 162 MHz (Fin) clock speed. A spreading selection of FS0=1, SR0=1 and
modulation rate selection MRA=1, enables input frequency range from 80 ~ 166 MHz and provides a
percentage deviation of +/-1.00% (see Table 1) of the input frequency (Fin). This results in frequency on
ModOUT being swept from 160.38 MHz to 163.62 MHz at a modulation rate of 42.18 KHz (162 MHz/80 MHz X
20.83KHz). This particular example (see below figure) given here is a common EMI reduction method for
notebook and LCD monitor manufacturers and has already been implemented by most of the leading OEM and
mobile graphic accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
High Frequency LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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October 2003
rev E
P2160
EMC Software Simulation
By using Alliance Semiconductor’s proprietary EMC simulation software – EMI-lator®, radiated system level EMI
analysis can be made easier to allow a quantitative assessment on Alliance’s EMI reduction products. The
simulation engine of this EMC software has already been characterized to correlate with the electrical
characteristics of Alliance EMI reduction IC’s. The figure below is an example of the simulation result. Please
visit our web site at
www.alsc.comfor
information on how to obtain a free copy and demonstration of EMI-lator®.
Simulation Result from EMI-lator®
High Frequency LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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October 2003
rev E
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
T
STG
T
A
Parameter
Voltage on any pin with respect to GND
Storage temperature
Operating temperature
Rating
-0.5 to + 7.0
-65 to +125
0 to +70
Unit
V
°C
°C
P2160
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
I
CC
V
DD
t
ON
Z
OUT
Input Low Voltage
Input High Voltage
Input Low Current (pull-up resistor on inputs FS0, SR0
and MRA)
Input High Current (pull-down resistor on input SSON#)
Output Low Voltage (V
DD
=3.3V, I
OL
= 20 mA)
Output High Voltage (V
DD
=3.3V, I
OH
= 20 mA)
Static Supply Current, measured @ FS0=0
@ FS0=1
Dynamic Supply Current FS0=0 (see f
IN
)
(3.3V and 15 pF loading) FS0=1 (see f
IN
)
Operating Voltage
Power Up Time (First locked clock cycle after power up)
Clock Output Impedance
Parameter
Min
GND – 0.3
2.0
-
-
-
2.5
-
7.92
10.9
2.7
Typ
-
-
-
-
-
-
3.27
0.67
10
16
3.3
0.18
50
Max
0.8
V
DD
+ 0.3
-35
35
0.4
-
-
12.9
22.1
3.8
Unit
V
V
µA
µA
V
V
mA
mA
V
ms
Ω
AC Electrical Characteristics
Symbol
f
IN
t
LH
*
t
HL
*
t
JC
Parameter
Input Frequency when FS0=0
FS0=1
Output rise time
(Measured at 0.8V to 2.0V)
Output fall time
(Measured at 0.8V to 2.0V)
Jitter (cycle to cycle)
Min
40
80
0.7
0.6
-
45
Typ
65
120
0.9
0.8
-
50
Max
80
166
1.1
1.0
360
55
Unit
MHz
MHz
ns
ns
ps
%
t
D
Output duty cycle
*t
LH
and t
HL
are measured into a capacitive load of 15pF
High Frequency LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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嵌入式系统
